Controlling circuit of power semiconductor device and controlling integrated circuit

• US 20060044726A1
• Filed: 01/05/2005
• Published: 03/02/2006
• Est. Priority Date: 09/02/2004
• Status: Abandoned Application

• Current Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Original Assignee: Mitsubishi Denki Kabushiki Kaisha (Mitsubishi Electric Corporation)
• Inventors: Shirakawa, Shinya, Sakata, Hiroshi
• Application Number:
  US11/028,732
• Publication Number:
  US 20060044726A1
• Time in Patent Office: Days
• US Class Current: 361/100
• CPC Class Codes: H02H 3/06 with automatic reconnection
• CPC Class Codes: H02H 7/0838 with H-bridge circuit

Abstract

A shunt voltage that is generated at a shunt resistor (50) is input to overcurrent detecting means (22). When detecting an overcurrent, the overcurrent detecting means (22) inputs a current abnormality signal indicative of a current abnormality to reset signal outputting means (24). The reset signal outputting means (24) stores the occurrence of abnormality from the received current abnormality signal, and waits for recovery from the abnormality afterward. Then, when an overcurrent is no longer detected from the received current abnormality signal, the reset signal outputting means (24) determines that recovery from the abnormality has taken place, and inputs a reset signal composed of a pulse signal of H level for starting the operation to a fault signal output circuit (17) through a reset terminal (RESET). The fault signal output circuit (17) which has received the reset signal inputs a fault signal that has been shifted from L level to H level to a lower arm drive circuit (14).

Claims

1. A controlling circuit of a power semiconductor device that controls a power semiconductor device using a microcomputer through a controlling integrated circuit, wherein

when detecting an abnormality from a current detection signal output from said power semiconductor device, said controlling integrated circuit turns off said power semiconductor device with a fault signal output from a fault signal output circuit included therein, and

when detecting recovery from the abnormality from said current detection signal, said microcomputer outputs a reset signal to cancel said fault signal.

2. A controlling integrated circuit comprising:

an input circuit to receive a control signal for controlling a power semiconductor element;

a level shift circuit converting the output from said input circuit into a plurality of levels;

a first drive circuit outputting a first drive signal toward a first power semiconductor element based on the output from said level shift circuit;

a second drive circuit outputting a second drive signal toward a second power semiconductor element based on the output from said level shift circuit, while suspending the output of said second drive signal when a received fault signal shifts from an inactive state to an active state;

an overcurrent detection circuit outputting an abnormality signal based on a current detection signal which is based on said second power semiconductor element; and

a fault signal output circuit shifting said fault signal to said active state when said abnormality signal is output from said overcurrent detection circuit, and shifting said fault signal to said inactive state when detecting a reset signal input from outside.

3. The controlling integrated circuit according to claim 2, further comprising an abnormality detection circuit detecting an abnormality of a drive potential for driving said power semiconductor element, wherein

said fault signal output circuit shifts said fault signal to said active state when said abnormality detection circuit detects an abnormality.