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Semiconductor integrated circuit

  • US 20060044871A1
  • Filed: 08/03/2005
  • Published: 03/02/2006
  • Est. Priority Date: 08/30/2004
  • Status: Active Grant
First Claim
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1. A semiconductor integrated circuit comprising:

  • a central processing unit; and

    a rewritable nonvolatile memory area provided in an address space in the central processing unit, wherein the nonvolatile memory area includes a first nonvolatile memory area and a second nonvolatile memory area, each of which is capable of storing information in accordance with the difference in threshold voltages, wherein one or plural conditions out of erase verify voltage, erase verify current, write verify voltage, write verify current, erase voltage, erase voltage application time, write voltage, and write voltage application time is/are made different between the first nonvolatile memory area and the second nonvolatile memory area, wherein speed of reading information stored in the first nonvolatile memory area is higher than that of reading information stored in the second nonvolatile memory area, and wherein the assured number of rewriting times in the second nonvolatile memory area is larger than that in the first nonvolatile memory area.

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