Method of design analysis of existing integrated circuits

• US 20060045325A1
• Filed: 08/31/2004
• Published: 03/02/2006
• Est. Priority Date: 08/31/2004
• Status: Active Grant

• Current Assignee: TechInsights, Inc. (M3, Inc.)
• Original Assignee: Semiconductor Insights Incorporated (Informa PLC)
• Inventors: Zavadsky, Vyacheslav L., Abt, Jason, Keyes, Edward, Begg, Stephen, Gont, Val
• Granted Patent: US 7,643,665 B2
• Time in Patent Office: Days
• US Class Current: 382/145
• CPC Class Codes: G01R 31/31704 Design for test; Design verification concerning scan tests G01R31/318583; computer-aided design G06F30/00
• CPC Class Codes: G01R 31/318357 Simulation computer simulation of digital circuits G06F30/3308
• CPC Class Codes: G06T 2207/30148 Semiconductor; IC; Wafer
• CPC Class Codes: G06T 7/001 using an image reference approach
• CPC Class Codes: G06T 7/74 involving reference images or patches

Abstract

The present invention involves a computationally efficient method of determining the locations of standard cells in an image of an IC layout. The initial step extracts and characterizes points of interest of the image. A coarse localization of possible standard cell locations is performed and is based on a comparison of the points of interest of an instance of an extracted standard cell and the remaining points of interest in the image. A more rigid comparison is made on the list of possible locations comprising a coarse match and a fine match. The coarse match results in a shortlist of possible locations. The fine match performs comparisons between the template and the shortlist. Further filtering is done to remove the effects of noise and texture variations and statistics on the results are generated to achieve the locations of the standard cells on the IC layout.

Claims

1. A method of determining high probability locations of standard cells in an image of an IC layout comprising:

extracting and characterizing features of the IC layout;

extracting a standard cell from the IC layout and using the standard cell as a template for comparison;

obtaining a coarse localization of possible locations of standard cells by comparing characterizing features of the template with characterizing features of the remainder of the IC layout; and

applying a fine filter to said possible locations to obtain said high probability locations.

2. A method as claimed in claim 1 comprising

applying a coarse filter to said possible locations to obtain coarse filtered possible locations, wherein the fine filter is applied to said coarse filtered possible locations to obtain said high probability locations.

3. A method as claimed in claim 1 wherein obtaining a coarse localization of possible locations of standard cells comprises:

comparing said features from the first instance of a standard cell to said features of the image to identify similar features;

casting votes on the similar features to show the level of confidence on the similarity of the similar features; and

computing the weight of the votes and determining possible matches by locations on the image showing high weights.

4. A method as claimed in claim 1 wherein the application of the fine filter comprises:

computing gradients for the template and a possible location from the set of possible locations;

computing a first set of dot products of the gradients;

applying morphological dilation of the first set of dot products to obtain a second set of dot products;

determining order statistics on the second set of dot products; and

determining if the order statistics are below a predefined threshold, wherein if the order statistics are less than the predefined threshold, the possible location is the high probability location.

5. A method as claimed in claim 1 wherein the characterizing features comprise points of interest on a first conductive layer of the IC.

6. A method as claimed in claim 5 wherein the points of interest are selected from centers of contacts on the first conductive layer, vias on the first conductive layer and corners of polygons representing the first conductive layer.

7. A method of determining possible locations of standard cells in an image of an IC layout comprising:

extracting points of interest from the image;

creating a descriptor in the vicinity of each of the points of interest;

extracting a first instance of a standard cell from the image;

comparing descriptors from the first instance of a standard cell to the other the descriptors of the image to identify similar points of interest;

casting votes on the similar points of interest to show the level of confidence on the similarity of the similar points of interest; and

computing the weight of the votes and determining possible matches by locations on the image showing high weights.

8. A method as claimed in claim 7 wherein said points of interest comprise centers of contacts on the first conductive layer.

9. A method as claimed in claim 7 wherein said points of interest comprise centers of vias on the first conductive layer.

10. A method as claimed in claim 7 wherein said points of interest comprise corners of polygons representing the first conductive layer.

11. A method as claimed in claim 7 wherein the descriptor comprises a grid having a number of non-overlapped rectangles, said non-overlapped rectangles represented by a first bit if they contain at least a predetermined percentage of the first conductive layer and represented by a second bit if they contain less than the predetermined percentage.

12. A method as claimed in claim 7 wherein the descriptor is a 32-bit bitmap descriptor.

13. A method as claimed in claim 7 wherein the descriptors from the first instance of a standard cell comprise eight possible orientations of the standard cell.

14. A rigid comparison method of determining whether a possible location of a standard cell in an image of an IC layout is a true high probability match of the standard cell represented by a template comprising:

computing gradients for the template and a possible location from a set of possible locations;

computing a first set of dot products of the gradients;

applying morphological dilation of the first set of dot products to obtain a second set of dot products;

determining order statistics on the second set of dot products; and

determining if the order statistics are below a predefined threshold, wherein if the order statistics are less than said predefined threshold, the possible location is a true instance of the standard cell.

15. Apparatus for determining high probability locations of standard cells in an image of an IC layout comprising:

means for extracting and characterizing features of the IC layout;

means for creating a symbolic representation of a standard cell from the IC layout and using the standard cell as a template for comparison;

means for obtaining a coarse localization of possible locations of standard cells by comparing characterizing features of the template with characterizing features of the remainder of the IC layout;

means for applying a coarse filter to the possible locations to obtain coarse filtered possible locations; and

means for applying a fine filter to the coarse filtered possible locations to obtain said high probability locations.

16. Apparatus as claimed in claim 15 wherein the means for obtaining a coarse localization of possible locations of standard cells comprises:

means for comparing said features from the first instance of a standard cell to said features of the image to identify similar features;

means for casting votes on the similar features to show the level of confidence on the similarity of the similar features; and

computing the weight of the votes and determining possible matches by locations on the image showing high weights.

17. Apparatus as claimed in claim 15 wherein the fine filter means comprises:

means for computing gradients for the template and a possible location from the set of possible locations;

means for computing a first set of dot products of the gradients;

means for applying morphological dilation of the first set of dot products to obtain a second set of dot products;

means for determining order statistics on the second set of dot products; and

means for determining if the order statistics are below a predefined threshold, wherein if the order statistics are less than the predefined threshold, the possible location is one of said high probability locations.

18. Apparatus as claimed in claim 15 wherein the characterizing features comprise points of interest on a first conductive layer of the IC selected from centers of contacts on the first conductive layer, centers of vias on the first conductive layer and corners of polygons representing the first conductive layer.

19. Apparatus for determining possible locations of standard cells in an image of an IC layout comprising:

means for extracting points of interest from the image;

means for creating a descriptor in the vicinity of each of the points of interest;

means for extracting a first instance of a standard cell from the image;

means for comparing descriptors from the first instance of a standard cell to the other the descriptors of the image to identify similar points of interest;

means for casting votes on the similar points of interest to show the level of confidence on the similarity of the similar points of interest; and

computing the weight of the votes and determining possible matches by locations on the image showing high weights.

20. Apparatus as claimed in claim 19 wherein the points of interest are selected from centers of contacts on the first conductive layer, centers of vias on the first conductive layer and corners of polygons representing the first conductive layer.

21. Apparatus as claimed in claim 19 wherein the descriptor comprises a grid having a number of non-overlapped rectangles, said non-overlapped rectangles represented by a first bit if they contain at least a predetermined percentage of the first conductive layer and represented by a second bit if they contain less than the predetermined percentage.

22. Apparatus as claimed in claim 19 wherein the descriptor is a 32-bit bitmap descriptor.

23. Apparatus as claimed in claim 19 wherein the descriptors from the first instance of a standard cell comprise eight possible orientations of the standard cell.

24. Apparatus for determining whether a possible location of a standard cell in an image of an IC layout is a high probability match of the standard cell represented by a template using a rigid comparison method comprising:

means for computing gradients for the template and a possible location from a set of possible locations;

means for computing a first set of dot products of the gradients;

means for applying morphological dilation of the first set of dot products to obtain a second set of dot products;

means for determining order statistics on the second set of dot products; and

means for determining if the order statistics are below a predefined threshold, wherein if the order statistics are less than said predefined threshold, the possible location is a high probability match of the standard cell.