Thin-film transistor with vertical channel region
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Accused Products
Abstract
A vertical thin-film transistor (V-TFT) is provided along with a method for forming the V-TFT. The method comprises: providing a substrate made from a material such as Si, quartz, glass, or plastic; conformally depositing an insulating layer overlying the substrate; forming a gate, having sidewalls and a thickness, overlying a substrate insulation layer; forming a gate oxide layer overlying the gate sidewalls, and a gate insulation layer overlying the gate top surface; etching the exposed substrate insulation layer; forming a first source/drain region overlying the gate insulation layer; forming a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and, forming a channel region overlying the first gate sidewall with a channel length about equal to the thickness of the gate, interposed between the first and second source/drain regions.
18 Citations
33 Claims
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1-18. -18. (canceled)
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19. A vertical thin film transistor (V-TFT), the transistor comprising:
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a substrate;
a substrate insulation layer overlying the substrate;
a gate, having sidewalls and a top surface, overlying the substrate insulation layer;
a gate insulation layer overlying the gate top surface;
a first source/drain region overlying the gate insulation layer;
a second source/drain region overlying the substrate insulation layer, adjacent a first gate sidewall; and
,a channel region overlying the first gate sidewall, interposed between the first and second source/drain regions. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33)
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Specification