Semiconductor device having fuse and protection circuit

• US 20060049466A1
• Filed: 03/18/2005
• Published: 03/09/2006
• Est. Priority Date: 09/06/2004
• Status: Active Grant

• Current Assignee: LAPIS Semiconductor Co., Ltd. (ROHM Co., Ltd.)
• Original Assignee: Oki Semiconductor Company Limited (ROHM Co., Ltd.)
• Inventors: Egawa, Noboru, Fukuda, Yasuhiro
• Granted Patent: US 7,816,761 B2
• Time in Patent Office: Days
• US Class Current: 257/379
• CPC Class Codes: H01L 23/5258 the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
• CPC Class Codes: H01L 27/0251 for MOS devices
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device having a semiconductor substrate, an insulating layer, a fuse, a diffusion layer and a resistor. The semiconductor substrate has a first conductivity type. The insulating layer is selectively formed on the surface of the semiconductor substrate. The fuse is formed on the insulating layer. The diffusion layer has a second conductivity type. The diffusion layer is formed on the surface of the semiconductor substrate and electrically connected to the fuse. The first resistor is electrically connected to the fuse.

Claims

1. A semiconductor device comprising:

a semiconductor substrate having a first conductivity type and a surface thereof;

an insulating layer selectively formed on the surface of the semiconductor substrate;

a fuse formed on the insulating layer, the fuse having a first terminal and a second terminal;

a first diffusion layer having a second conductivity type formed on the surface of the semiconductor substrate, the first diffusion layer being electrically connected to the first terminal of the fuse; and

a first resistor electrically connected to the first terminal of the fuse.

2. A semiconductor device according to claim 1, further comprising,

a second diffusion layer having the second conductivity type formed on the surface of the semiconductor substrate, the second diffusion layer being electrically connected to the second terminal of the fuse;

and

a second resistor electrically connected to the second terminal of the fuse.

3. A semiconductor device according to claim 1, wherein the fuse is formed of polysilicon.

4. A semiconductor device according to claim 1, wherein the first resistor is formed of polysilicon.

5. A semiconductor device according to claim 1, wherein the first resistor is formed of a third diffusion layer formed on the surface of the substrate.

6. A semiconductor device according to claim 1, further comprising an inverter connected to the first resistor.

7. A semiconductor device according to claim 1, wherein the second terminal of the fuse is connected to the ground.

8. A semiconductor device according to claim 1, wherein the fuse, first diffusion layer and the first fuse are surrounded by a fourth diffusion layer having the first conductivity type and being connected to the ground.

9. A semiconductor device comprising:

a fuse having a first terminal and a second terminal;

a first electro static discharge circuit connected to the first terminal of the fuse; and

a first internal circuit connected to the first electro static discharge circuit.

10. A semiconductor device according to claim 9, wherein the first electro static discharge circuit includes:

a diode having a cathode terminal connected to the first terminal of the fuse and an anode terminal connected to the ground; and

a resistor connected to the first terminal of the fuse.

11. A semiconductor device according to claim 9, further comprising:

a second electro static discharge circuit connected to the second terminal of the fuse; and

a second internal circuit connected to the second electro static discharge circuit.

12. A semiconductor device according to claim 11, wherein the second electro static discharge circuit includes:

a diode having a cathode terminal connected to the first terminal of the fuse and an anode terminal connected to the ground; and

a resistor connected to the first terminal of the fuse.

13. A semiconductor device according to claim 9, wherein the second terminal of the fuse is connected to the ground.

14. A semiconductor device comprising:

a semiconductor substrate having a first conductivity type and a surface thereof;

an insulating layer selectively formed on the surface of the semiconductor substrate;

a first fuse formed on the insulating layer, the fuse having a first terminal and a second terminal;

a first diffusion layer having a second conductivity type formed on the surface of the semiconductor substrate, the first diffusion layer being electrically connected to the first terminal of the fuse;

a second diffusion layer having the second conductivity type formed on the surface of the semiconductor substrate, the second diffusion layer being electrically connected to the ground;

a gate insulating layer formed on the surface of the substrate, the gate insulating layer formed between the first and second diffusion layer;

a gate electrode formed on the gate insulating layer; and

a first resistor electrically connected to the first terminal of the fuse.

15. A semiconductor device according to claim 14, further comprising,

a third diffusion layer having the second conductivity type formed on the surface of the semiconductor substrate, the second diffusion layer being electrically connected to the second terminal of the fuse;

and

a second resistor electrically connected to the second terminal of the fuse.

16. A semiconductor device according to claim 14, wherein the fuse is formed of polysilicon.

17. A semiconductor device according to claim 14, wherein the first resistor is formed of polysilicon.

18. A semiconductor device according to claim 14, wherein the first resistor is formed of a fourth diffusion layer formed on the surface of the substrate.

19. A semiconductor device according to claim 14, further comprising an inverter connected to the first resistor.

20. A semiconductor device according to claim 14, wherein the second terminal of the fuse is connected to the ground.

21. A semiconductor device according to claim 14, wherein the fuse, first diffusion layer and the first fuse are surrounded by a fifth diffusion layer having the first conductivity type and being connected to the ground.

22. A semiconductor device according to claim 21, wherein the second diffusion layer is electrically connected to the fifth diffusion layer.

23. A semiconductor device according to claim 14, wherein the gate electrode is electrically connected to the ground.