Fault protection scheme for CCFL integrated circuits

• US 20060049773A1
• Filed: 08/23/2005
• Published: 03/09/2006
• Est. Priority Date: 08/23/2004
• Status: Abandoned Application

• Current Assignee: Monolithic Power Systems Incorporated
• Original Assignee: Monolithic Power Systems Incorporated
• Inventors: Moyer, James C., Ueunten, Paul
• Application Number:
  US11/210,542
• Publication Number:
  US 20060049773A1
• Time in Patent Office: Days
• US Class Current: 315/209.R
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H05B 41/2855 against abnormal lamp operating conditions

Abstract

In one embodiment, an apparatus is provided. The apparatus includes a power bridge suitable for coupling to a CCFL (cold cathode fluorescent lamp) load and providing an operating current to the load. The apparatus also includes a replica component coupled to the power bridge to provide a replica current proportional to the operating current. The apparatus further includes a reference component receptacle to produce a reference current in conjunction with an external reference component. The apparatus also includes a comparison component coupled to the replica component and the reference component to compare the replica component to the reference component.

Claims

1. An apparatus, comprising:

a power bridge suitable for coupling to a CCFL (cold cathode fluorescent lamp) load and providing an operating current to the load;

a replica component coupled to the power bridge to provide a replica current proportional to the operating current;

a reference component receptacle to produce a reference current in conjunction with an external reference component;

and

a comparison component coupled to the replica component and the reference component to compare the replica component to the reference component.

2. The apparatus of claim 1, wherein:

the replica component is coupled through an operational amplifier to the power bridge.

3. The apparatus of claim 1, wherein:

the comparison component is a current mirror and a buffer coupled to the current mirror.

4. The apparatus of claim 1, wherein:

the reference component receptacle is coupled to an external reference component chosen in proportion to an expected output level of the power bridge.

5. The apparatus of claim 1, further comprising:

a bandgap voltage regulator coupled to the reference component receptacle.

6. The apparatus of claim 5, wherein:

the bandgap voltage regulator includes a transistor coupled between the comparison component and the reference component receptacle and an operational amplifier having an output coupled to the transistor, a first input coupled to the reference component receptacle and a second input coupled to a bandgap voltage reference.

7. The apparatus of claim 1, wherein:

The power bridge is a set of matched power MOSFETs.

8. The apparatus of claim 7, wherein:

the replica component is a MOSFET scaled in proportion to power MOSFETs of the power bridge.

9. The apparatus of claim 1, further comprising:

a bandgap voltage regulator coupled to the reference component receptacle,

the bandgap voltage regulator including a first MOSFET coupled between the comparison component and the reference component receptacle and a first operational amplifier having an output coupled to the transistor, a first input coupled to the reference component receptacle and a second input coupled to a bandgap voltage reference.

10. The apparatus of claim 9, wherein:

the comparison component is a current mirror and a buffer coupled to the current mirror.

11. The apparatus of claim 10, wherein:

the power bridge is a set of matched power MOSFETs;

and

the replica component is a second MOSFET scaled in proportion to power MOSFETs of the power bridge.

12. A method of operating a power supply for a cold cathode fluorescent lamp, the method comprising:

operating the power supply and producing an operating current;

producing a reference current with a reference component;

producing a replica current proportional to the operating current;

comparing the replica current to the reference current;

and

signaling a fault if the replica current and the reference current are unequal.

13. The method of claim 12, wherein:

the reference component is a resistor coupled to the power supply.

14. The method of claim 12, further comprising:

buffering a fault pin of the power supply by comparing the fault pin to a bandgap voltage.

15. A power supply for a cold cathode fluorescent lamp, comprising:

A first power transistor having a first node, second node and gate node, the first node coupled to a power supply;

A second power transistor having a first node, second node and gate node, the second power transistor matched to the first power transistor, the first node coupled to a power supply;

A third power transistor having a first node, second node and gate node, the first node coupled to the second node of the first power transistor, the second node coupled to ground;

A fourth power transistor having a first node, second node and gate node, the fourth power transistor matched to the third power transistor, the first node coupled to the second node of the second power transistor, the second node coupled to ground;

A replica transistor formed proportional to the third and fourth power transistors, having a first node, second node and gate node, the second node coupled to ground, the first node regulated to match the first node of the third and fourth power transistors in alternation;

A current mirror, the current mirror coupled to the first node of the replica transistor;

And

A reference terminal, the reference terminal coupled to the current mirror.

16. The power supply of claim 15, further comprising:

an operational amplifier having a first input and a second input, the first input coupled to the first node of the replica transistor, the second input alternatingly coupled to the first node of the third power transistor and the first node of the fourth power transistor.

17. The power supply of claim 15, further comprising:

a Schmitt-triggered buffer coupled to the current mirror.

18. The power supply of claim 15, further comprising:

a transistor having a first node, second node and gate node, the first node coupled to the current mirror, the second node coupled to the reference terminal;

and

an operational amplifier, having a first input, second input and output, the first input coupled to a bandgap voltage reference, the second input coupled to the reference terminal, the output coupled to the gate node of the transistor.

19. The power supply of claim 15, further comprising:

an operational amplifier, having a first input, second input and output, the second input coupled to the first node of the replica transistor, the output coupled to the first input;

a first switch, the first switch coupled between the first input of the operational amplifier and the first node of the third power transistor;

and

a second switch, the second switch coupled between the first input of the operational amplifier and the first node of the fourth power transistor.

20. The power supply of claim 15, further comprising:

a Schmitt-triggered buffer coupled to the current mirror;

a reference transistor having a first node, second node and gate node, the first node coupled to the current mirror, the second node coupled to the reference terminal;

a first operational amplifier, having a first input, second input and output, the first input coupled to a bandgap voltage reference, the second input coupled to the reference terminal, the output coupled to the gate node of the reference transistor;

a second operational amplifier, having a first input, second input and output, the second input coupled to the first node of the replica transistor, the output coupled to the first input;

a first switch, the first switch coupled between the first input of the second operational amplifier and the first node of the third power transistor;

and

a second switch, the second switch coupled between the first input of the second operational amplifier and the first node of the fourth power transistor.