Multilayered printed circuit board
First Claim
1. A multilayered printed circuit board comprising:
- a first surface layer that includes a semiconductor integrated circuit;
a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;
a main power supply wiring layer that is provided in a layer between the first and second surface layers; and
a ground layer that is provided in a layer between the first and second surface layers, wherein one terminal of the bypass capacitor is connected to a midpoint of a wiring path that extends from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path that extends from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.
1 Assignment
0 Petitions
Accused Products
Abstract
A multilayered printed circuit board includes a first surface layer that includes a semiconductor integrated circuit, a second surface layer that includes a bypass capacitor and that is opposite to the first surface layer, a main power supply wiring layer, and a ground layer between the first and second surface layers. In the multilayered printed circuit board, one terminal of the bypass capacitor is connected to a midpoint of a wiring path from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.
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Citations
11 Claims
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1. A multilayered printed circuit board comprising:
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a first surface layer that includes a semiconductor integrated circuit;
a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;
a main power supply wiring layer that is provided in a layer between the first and second surface layers; and
a ground layer that is provided in a layer between the first and second surface layers, wherein one terminal of the bypass capacitor is connected to a midpoint of a wiring path that extends from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path that extends from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.
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2. A multilayered printed circuit board comprising:
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a first surface layer that includes a semiconductor integrated circuit;
a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;
a main power supply wiring layer that is provided in a layer between the first and second surface layers; and
a ground layer that is provided in a layer between the first and second surface layers, wherein one terminal of the bypass capacitor is connected to a midpoint of a wiring path that extends from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an inductance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than a parasitic inductance in the bypass capacitor.
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3. A multilayered printed circuit board comprising:
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a first surface layer that includes a semiconductor integrated circuit;
a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;
a main power supply wiring layer that is provided in a layer between the first and second surface layers;
a ground layer that is provided in a layer between the first and second surface layers;
a first power-supply via hole that extends from the first surface layer to the second surface layer and that is not electrically connected to the main power supply wiring layer;
a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via hole;
a second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer;
a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via hole to the second power-supply via hole; and
a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer, wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor. - View Dependent Claims (4, 5, 6, 7)
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8. A multilayered printed circuit board comprising:
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a first surface layer that includes a semiconductor integrated circuit;
a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;
a main power supply wiring layer that is provided in a layer between the first and second surface layers;
a ground layer that is provided in a layer between the first and second surface layers;
first power-supply via holes that extend from the first surface layer to the second surface layer and that are not electrically connected to the main power supply wiring layer;
a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via holes;
at least one second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer;
a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via holes to the at least one second power-supply via hole; and
a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer, wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor, and the number of the first power-supply via holes is larger than the number of the at least one second power-supply via hole. - View Dependent Claims (9)
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10. A multilayered printed circuit board comprising:
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a first surface layer that includes a semiconductor integrated circuit;
a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;
a main power supply wiring layer that is provided in a layer between the first and second surface layers;
a ground layer that is provided in a layer between the first and second surface layers;
a first power-supply via hole that extends from the first surface layer to the second surface layer and that is not electrically connected to the main power supply wiring layer;
a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via hole;
a second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer;
a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via hole to the second power-supply via hole; and
a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer, wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor, and an impedance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path that extends from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.
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11. A multilayered printed circuit board comprising:
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a first surface layer that includes a semiconductor integrated circuit;
a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;
a main power supply wiring layer that is provided in a layer between the first and second surface layers;
a ground layer that is provided in a layer between the first and second surface layers;
a first power-supply via hole that extends from the first surface layer to the second surface layer and that is not electrically connected to the main power supply wiring layer;
a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via hole;
a second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer;
a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via hole to the second power-supply via hole; and
a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer, wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor, and an inductance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than a parasitic inductance in the bypass capacitor.
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Specification