Multilayered printed circuit board

• US 20060050491A1
• Filed: 09/02/2005
• Published: 03/09/2006
• Est. Priority Date: 09/07/2004
• Status: Active Grant

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Inagawa, Hideho, Hayashi, Seiji
• Granted Patent: US 7,466,560 B2
• Time in Patent Office: Days
• US Class Current: 361/760
• CPC Class Codes: H05K 1/0231 Capacitors or dielectric substances
• CPC Class Codes: H05K 1/165 incorporating printed inductors
• CPC Class Codes: H05K 2201/09263 Meander
• CPC Class Codes: H05K 2201/0949 Pad close to a hole, not surrounding the hole if used for surface mounting H05K1/114
• CPC Class Codes: H05K 2201/10545 Related components mounted on both sides of the PCB
• CPC Class Codes: H05K 2201/10689 Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]
• CPC Class Codes: H05K 3/429 Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers

Abstract

A multilayered printed circuit board includes a first surface layer that includes a semiconductor integrated circuit, a second surface layer that includes a bypass capacitor and that is opposite to the first surface layer, a main power supply wiring layer, and a ground layer between the first and second surface layers. In the multilayered printed circuit board, one terminal of the bypass capacitor is connected to a midpoint of a wiring path from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.

Claims

1. A multilayered printed circuit board comprising:

a first surface layer that includes a semiconductor integrated circuit;

a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;

a main power supply wiring layer that is provided in a layer between the first and second surface layers; and

a ground layer that is provided in a layer between the first and second surface layers,

wherein one terminal of the bypass capacitor is connected to a midpoint of a wiring path that extends from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an impedance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path that extends from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.

2. A multilayered printed circuit board comprising:

a first surface layer that includes a semiconductor integrated circuit;

a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;

a main power supply wiring layer that is provided in a layer between the first and second surface layers; and

a ground layer that is provided in a layer between the first and second surface layers,

wherein one terminal of the bypass capacitor is connected to a midpoint of a wiring path that extends from the main power supply wiring layer to a power supply terminal of the semiconductor integrated circuit, and an inductance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than a parasitic inductance in the bypass capacitor.

3. A multilayered printed circuit board comprising:

a first surface layer that includes a semiconductor integrated circuit;

a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;

a main power supply wiring layer that is provided in a layer between the first and second surface layers;

a ground layer that is provided in a layer between the first and second surface layers;

a first power-supply via hole that extends from the first surface layer to the second surface layer and that is not electrically connected to the main power supply wiring layer;

a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via hole;

a second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer;

a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via hole to the second power-supply via hole; and

a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer,

wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor.

4. The multilayered printed circuit board according to claim 3, wherein the second power-supply via hole is disposed on the ground via hole side of a perpendicular bisector of the line segment between the first power-supply via hole and the ground via hole, and is disposed within a circle with its center at the ground via hole and with a radius of D=2L/e, where L is the via length and e is the base of the natural logarithm.

5. The multilayered printed circuit board according to claim 3, wherein the second power-supply via hole is disposed on a straight line that passes through the first power-supply via hole and the ground via hole.

6. The multilayered printed circuit board according to claim 3, wherein the second conductor pattern includes a meandering portion between the bypass capacitor and the second power-supply via hole.

7. The multilayered printed circuit board according to claim 3, wherein an inside diameter of the first power-supply via hole is larger than an inside diameter of the second power-supply via hole.

8. A multilayered printed circuit board comprising:

a first surface layer that includes a semiconductor integrated circuit;

a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;

a main power supply wiring layer that is provided in a layer between the first and second surface layers;

a ground layer that is provided in a layer between the first and second surface layers;

first power-supply via holes that extend from the first surface layer to the second surface layer and that are not electrically connected to the main power supply wiring layer;

a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via holes;

at least one second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer;

a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via holes to the at least one second power-supply via hole; and

a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer,

wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor, and the number of the first power-supply via holes is larger than the number of the at least one second power-supply via hole.

9. The multilayered printed circuit board according to claim 8, wherein the length of the at least one second power-supply via hole is larger than the length of the first power-supply via holes.

10. A multilayered printed circuit board comprising:

a first surface layer that includes a semiconductor integrated circuit;

a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;

a main power supply wiring layer that is provided in a layer between the first and second surface layers;

a ground layer that is provided in a layer between the first and second surface layers;

a first power-supply via hole that extends from the first surface layer to the second surface layer and that is not electrically connected to the main power supply wiring layer;

a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via hole;

a second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer;

a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via hole to the second power-supply via hole; and

a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer,

wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor, and an impedance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than an impedance of a second wiring path that extends from the terminal of the bypass capacitor to the power supply terminal of the semiconductor integrated circuit.

11. A multilayered printed circuit board comprising:

a first surface layer that includes a semiconductor integrated circuit;

a second surface layer that includes a bypass capacitor and that is provided on a face of the multilayered printed circuit board opposite to a face of the multilayered printed circuit board on which the first surface layer is provided;

a main power supply wiring layer that is provided in a layer between the first and second surface layers;

a ground layer that is provided in a layer between the first and second surface layers;

a first power-supply via hole that extends from the first surface layer to the second surface layer and that is not electrically connected to the main power supply wiring layer;

a first conductor pattern that is disposed on the first surface layer and that connects the power supply terminal of the semiconductor integrated circuit to the first power-supply via hole;

a second power-supply via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the main power supply wiring layer;

a second conductor pattern that is disposed on the second surface layer and that connects the first power-supply via hole to the second power-supply via hole; and

a ground via hole that extends from the second surface layer to the first surface layer and that is electrically connected to the ground layer,

wherein the second conductor pattern and the ground via hole are connected to one terminal of the bypass capacitor, and an inductance of a first wiring path that extends from the main power supply wiring layer to the terminal of the bypass capacitor is higher than a parasitic inductance in the bypass capacitor.