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Memory circuit with supply voltage flexibility and supply voltage adapted performance

  • US 20060050572A1
  • Filed: 08/24/2005
  • Published: 03/09/2006
  • Est. Priority Date: 08/24/2004
  • Status: Active Grant
First Claim
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1. A memory circuit comprising:

  • a plurality of memory cells organized in rows and columns;

    memory access circuitry controlled by at least one control signal; and

    control circuitry for generating the at least one control signal comprising;

    delay circuitry which delays a switching of the at least one control signal with the respective delay time being adjustable in view of the applied supply voltage.

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