Pipelined packet switching and queuing architecture
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Abstract
A pipelined linecard architecture for receiving, modifying, switching, buffering, queuing and dequeuing packets for transmission in a communications network. The linecard has two paths: the receive path, which carries packets into the switch device from the network, and the transmit path, which carries packets from the switch to the network. In the receive path, received packets are processed and switched in an asynchronous, multi-stage pipeline utilizing programmable data structures for fast table lookup and linked list traversal. The pipelined switch operates on several packets in parallel while determining each packet'"'"'s routing destination. Once that determination is made, each packet is modified to contain new routing information as well as additional header data to help speed it through the switch. Each packet is then buffered and enqueued for transmission over the switching fabric to the linecard attached to the proper destination port. The destination linecard may be the same physical linecard as that receiving the inbound packet or a different physical linecard. The transmit path consists of a buffer/queuing circuit similar to that used in the receive path. Both enqueuing and dequeuing of packets is accomplished using CoS-based decision making apparatus and congestion avoidance and dequeue management hardware. The architecture of the present invention has the advantages of high throughput and the ability to rapidly implement new features and capabilities.
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Citations
82 Claims
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1-50. -50. (canceled)
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51. An apparatus for switching packets, each packet having a header portion and a corresponding tail portion, the apparatus comprising:
a pipelined switch including;
a plurality of packet header buffers (PHBs);
a plurality of PHB pointers, each of the plurality of PHB pointers pointing to a PHB;
a plurality of pipeline stage circuits connected in a sequence and comprising at least a first stage circuit and a last stage circuit, wherein the first stage circuit reads the header portion and stores the header portion in at least one of the plurality of PHBs using at least one of the plurality of PHB pointers, and wherein the last stage circuit outputs a modified header portion; and
a tail portion transmission path for transmitting the tail portion through the pipelined switch. - View Dependent Claims (52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62)
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63. The apparatus comprising:
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a buffer that receives a plurality of packets, wherein at least one of the plurality of packets includes a class of service indicator;
a queue manager coupled to the buffer and operable to enqueue the at least one of the plurality of packets into one of a plurality of queues according to the class of service indicator; and
a dequeue circuit coupled to the queue manager, wherein the dequeue circuit uses the class of service indicator to dequeue the at least one of the plurality of packets. - View Dependent Claims (64, 65, 66, 67)
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68. A method comprising:
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receiving a packet having a header portion and a corresponding tail portion;
processing the packet through a pipelined switch having a plurality of packet header buffers (PHBs), a plurality of PHB pointers wherein each of the plurality of PHB pointer points to a corresponding one of the plurality of PHBs, and a plurality of pipeline stages connected in a sequence, the plurality of pipeline stages including at least a first stage and a last stage, said processing further comprising;
reading and storing the header portion in one of the plurality of PHBs using at least one of the plurality of PHB pointers; and
outputting a modified header portion based on the header portion; and
transmitting the tail portion along a transmission path through the pipelined switch. - View Dependent Claims (69, 70, 71, 72, 73, 74, 75, 76)
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77. A method comprising:
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storing a plurality of packets in a buffer, wherein at least one of the plurality of packets includes a class of service indicator;
enqueueing the at least one of the plurality of packets into one of a plurality of queues according to the class of service indicator; and
dequeueing the at least one of the plurality of packets using the class of service indicator to dequeue. - View Dependent Claims (78, 79, 80, 81)
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82. An apparatus comprising:
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a means for storing a plurality of packets, wherein at least one of the plurality of packets includes a means for indicating a class of service;
a means for enqueueing the at least one of the plurality of packets into one of a plurality of queues according to the means for indicating the class of service; and
a means for dequeueing the at least one of the plurality of packets using the means for indicating the class of service.
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Specification