Method for producing semiconductor chips using thin film technology, and semiconductor chip using thin film technology

• US 20060051937A1
• Filed: 08/01/2005
• Published: 03/09/2006
• Est. Priority Date: 07/30/2004
• Status: Active Grant

• Current Assignee: OSRAM OLED GMBH (Ams-Osram AG)
• Original Assignee: Osram Opto Semiconductors GmbH (Ams-Osram AG)
• Inventors: Ploessl, Andreas, Hahn, Berthold, Kaiser, Stephan, Harle, Volker
• Granted Patent: US 7,649,266 B2
• Time in Patent Office: Days
• US Class Current: 438/459
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2221/6835 used as a support during build up manufacturing of active devices
• CPC Class Codes: H01L 2221/68354 used to support diced chips prior to mounting
• CPC Class Codes: H01L 2221/68368 used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05639 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/32014 the layer connector being smaller than the bonding area, e.g. bond pad
• CPC Class Codes: H01L 2224/83801 Soldering or alloying
• CPC Class Codes: H01L 23/3185 the coating covering also the sidewalls of the semiconductor body
• CPC Class Codes: H01L 24/03 Manufacturing methods
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/0102 : Calcium [Ca]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01025 : Manganese [Mn]
• CPC Class Codes: H01L 2924/0103 : Zinc [Zn]
• CPC Class Codes: H01L 2924/01032 : Germanium [Ge]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01042 : Molybdenum [Mo]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01049 : Indium [In]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01068 : Erbium [Er]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/12036 : PN diode
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2924/3512 : Cracking
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 : Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/405 : Reflective materials
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Abstract

For semiconductor chips (1) using thin film technology, an active layer sequence (20) is applied to a growth substrate (3), on which a reflective electrically conductive contact material layer (40) is then formed. The active layer sequence is patterned to form active layer stacks (2), and reflective electrically conductive contact material layer (40) is patterned to be located on each active layer stack (2). Then, a flexible, electrically conductive foil (6) is applied to the contact material layers as an auxiliary carrier layer, and the growth substrate is removed.

Claims

1. A method for producing thin film semiconductor chips (1) comprising the steps:

applying an active layer sequence (20), which is suitable for generating electromagnetic radiation, on a growth substrate (3),

forming a reflective electrically conductive contact material layer (40) on the active layer sequence,

patterning the active layer sequence and the contact material layer (40) to form active layer stacks (21), which are separate from one another, on the growth substrate (3),

applying a flexible electrically conductive foil (6) to the reflective electrically conductive contact material layer (4), and

at least partially removing the growth substrate (3).

2. The method as claimed in claim 1, wherein said electrically conductive foil (6) is a carbon foil.

3. The method as claimed in claim 1, wherein said electrically conductive foil (6) has a thickness equal to or less than 100 μ

m.

4. The method as claimed in claim 1, wherein the electrically conductive contact material layer (40) contains a metal.

5. The method as claimed in claim 1, wherein a passivation layer is formed at least on parts of the side faces of the layer composite stacks (21) which are uncovered during the patterning step.

6. The method as claimed in claim 1, wherein an electrically conductive reinforcing layer (7) is applied to the reflective electrically conductive contact material layer (4).

7. The method as claimed in claim 6, wherein the electrically conductive reinforcing layer (7) contains a metal.

8. The method as claimed in claim 1, wherein, prior to the removal of the growth substrate (3), a rigid auxiliary carrier (8) is joined to the flexible electrically conductive foil (6).

9. The method as claimed in claim 1, wherein, after the growth substrate (3) has been removed, electrically conductive contact locations (9) are applied to that side of the active layer sequence of the active layer stacks (21) on which the growth substrate (3) was previously located.

10. The method as claimed in claim 9, wherein the electrically conductive contact locations contain a metal.

11. The method as claimed in claim 9, wherein an intermediate carrier (10) is applied to the electrically conductive contact locations (9), and the flexible electrically conductive foil (6) is removed so that separated thin film semiconductor chips are present on the intermediate carrier.

12. The method as claimed in claim 11, wherein the intermediate carrier used is a further foil.

13. The method as claimed in claim 11, wherein a passivation layer (5) is applied to the entire area of the side faces of the active layer stacks (21).

14. The method as claimed in claim 9, wherein following removal of the growth substrate (3) an intermediate carrier (10) is applied to the side of the active layer stacks (21) on which the growth substrate (3) was previously located, and then the flexible, electrically conductive foil (6) is removed, so that the thin film semiconductor chips (1) are located separated on the intermediate carrier (10).

15. The method as claimed in claim 14, wherein the intermediate carrier (10) is a further foil.

16. A thin film semiconductor chip (1) comprising:

an active layer stack (2) which is suitable for generating electromagnetic radiation,

an electrically conductive reflective contact material layer (4) on the active layer stack (2), and

a carrier layer comprising a flexible electrically conductive foil (6) on the electrically conductive reflective contact material layer (4).

17. The thin film semiconductor chip (1) as claimed in claim 16, wherein the electrically conductive foil (6) is a carbon foil.

18. The thin film semiconductor chip as claimed in claim 16, wherein the electrically conductive reflective contact material layer (4) contains a metallic material.

19. The thin film semiconductor chip as claimed in claim 16, wherein an electrically conductive reinforcing layer (7) is located between the carrier layer and the contact material layer (4).

20. The thin film semiconductor chip as claimed in claim 19, wherein the electrically conductive reinforcing layer (7) contains a metallic material.

21. The thin film semiconductor chip (1) as claimed in claim 16, wherein side faces of the thin film semiconductor chips (1) are at least partially provided with a passivation layer (5).

22. The thin film semiconductor chip (1) as claimed in claim 16, wherein side faces of the thin film semiconductor chips (1) are provided with a passivation layer (5) over their entire area.

23. The thin film semiconductor chip (1) as claimed in claim 16, having a total thickness of less than 150 μ

m.

24. The thin film semiconductor chip (1) as claimed in claim 16, having a total thickness of less than 100 μ

m.

25. A method for producing thin film semiconductor chips (1) comprising the steps of:

applying an active layer sequence (20), which is suitable for generating electromagnetic radiation, on a growth substrate (3);

forming a reflective electrically conductive contact material layer (40) on the active layer sequence;

forming composite layer stacks separated from each other on the growth substrate, each composite layer stack comprising a part of the active layer sequence and a part of the reflective electrically conductive contact material layer;

applying a flexible electrically conductive foil (6) to the reflective electrically conductive contact material layer (4); and

at least partially removing the growth substrate (3).

26. The method as claimed in claim 25, wherein said electrically conductive foil (6) is a carbon foil.

27. The method as claimed in claim 25, wherein an electrically conductive reinforcing layer (7) is applied to the reflective electrically conductive contact material layer (4).

28. The method as claimed in claim 25, wherein, prior to the removal of the growth substrate (3), a rigid auxiliary carrier (8) is joined to the flexible electrically conductive foil (6).