Light-emitting device of gallium nitride-based III-V group compound semiconductor

• US 20060054907A1
• Filed: 11/08/2004
• Published: 03/16/2006
• Est. Priority Date: 09/16/2004
• Status: Abandoned Application

• Current Assignee: Supernova Optoelectronics Corp.
• Original Assignee: Supernova Optoelectronics Corp.
• Inventors: Lai, Mu-Jen
• Application Number:
  US10/982,795
• Publication Number:
  US 20060054907A1
• Time in Patent Office: Days
• US Class Current: 257/96
• CPC Class Codes: H01L 33/22 Roughened surfaces, e.g. at the interface between epitaxial layers
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/42 Transparent materials

Abstract

A light-emitting device of gallium nitride-based III-V group compound semiconductor includes a substrate, a texturing surface area arranged over the substrate; a n-type gallium nitride-based III-V group compound semiconductor layer having an ohmic contact area with texturing surface disposed over the substrate; a light-emitting layer arranged over the n-type gallium nitride-based III-V group compound semiconductor layer; a p-type gallium nitride-based III-V group compound semiconductor layer disposed over the light-emitting layer; a texturing surface layer covered over the p-type gallium nitride-based III-V group compound semiconductor layer; a transparent conductive oxide layer arranged over the texturing surface layer and establishing an ohmic contact with the texturing surface layer; a first electrode electrically coupling with the ohmic contact area with texturing surface of the n-type gallium nitride-based III-V group compound semiconductor layer; a second electrode electrically coupling with the transparent conductive oxide layer.

Claims

1. A light-emitting device of gallium nitride-based III-V group compound semiconductor comprising:

a substrate;

a n-type gallium nitride-based III-V group compound semiconductor layer having an ohmic contact area with texturing surface, arranged over said substrate;

a light-emitting layer disposed over said n-type gallium nitride-based III-V group compound semiconductor layer;

a p-type gallium nitride-based III-V group compound semiconductor layer arranged over said light-emitting layer;

a texturing surface layer covered over said p-type gallium nitride-based III-V group compound semiconductor layer;

a transparent conductive oxide layer arranged over said texturing surface layer and establishing an ohmic contact with said texturing surface layer;

a first electrode electrically coupling with said ohmic contact area with texturing surface of said n-type gallium nitride-based III-V group compound semiconductor layer;

a second electrode electrically coupling with said transparent conductive oxide layer.

2. The device according to claim 1, wherein said texturing surface layer is formed during the growth of epitaxy.

3. The device according to claim 1, wherein said ohmic contact area with texturing surface of said n-type gallium nitride-based III-V group compound semiconductor layer is formed by etching part of said texturing surface layer, said p-type gallium nitride-based III-V group compound semiconductor layer, said light-emitting layer and said n-type gallium nitride-based III-V group compound semiconductor layer during a manufacturing process of chips.

4. The device according to claim 1, wherein said substrate further having a texturing surface area arranged thereover.

5. The device according to claim 4, wherein said texturing surface area of said substrate is formed by etching part of said texturing surface layer, said p-type gallium nitride-based III-V group compound semiconductor layer, said light-emitting layer and said n-type gallium nitride-based III-V group compound semiconductor layer during a manufacturing process of chips.

6. The device according to claim 1, wherein said transparent conductive oxide layer is made of an indium oxide, tin oxide, indium molybdenum oxide, indium cerium oxide, zinc oxide, indium zinc oxide, magnesium zinc oxide, tin cadmium oxide, or indium tin oxide.

7. A light-emitting device of gallium nitride-based III-V group compound semiconductor comprising:

a substrate;

a n-type gallium nitride-based III-V group compound semiconductor layer having an ohmic contact area with texturing surface, arranged over said substrate;

a light-emitting layer disposed over said n-type gallium nitride-based III-V group compound semiconductor layer;

a p-type gallium nitride-based III-V group compound semiconductor layer arranged over said light-emitting layer.

8. The device according to claim 7, wherein a texturing surface layer is arranged over said p-type gallium nitride-based III-V group compound semiconductor layer.

9. The device according to claim 8, wherein a transparent conductive oxide layer is arranged over said texturing surface layer.

10. The device according to claim 7, wherein a first electrode is electrically coupling with said ohmic contact area with texturing surface of said n-type gallium nitride-based III-V group compound semiconductor layer.

11. The device according to claim 7, wherein a second electrode is electrically coupling with said transparent conductive oxide layer.

12. The device according to claim 7, wherein said texturing surface layer is formed during the growth of epitaxy.

13. The device according to claim 7, wherein said ohmic contact area with texturing surface of said n-type gallium nitride-based III-V group compound semiconductor layer is formed by etching part of said texturing surface layer, said p-type gallium nitride-based III-V group compound semiconductor layer, said light-emitting layer and said n-type gallium nitride-based III-V group compound semiconductor layer during a manufacturing process of chips.

14. The device according to claim 7, wherein said transparent conductive oxide layer is made of an indium oxide, tin oxide, indium molybdenum oxide, indium cerium oxide, zinc oxide, indium zinc oxide, magnesium zinc oxide, tin cadmium oxide, or indium tin oxide.

15. A light-emitting device of gallium nitride-based III-V group compound semiconductor comprising:

a substrate with a texturing surface area thereover;

a n-type gallium nitride-based III-V group compound semiconductor layer arranged over said substrate;

a light-emitting layer disposed over said n-type gallium nitride-based III-V group compound semiconductor layer;

a p-type gallium nitride-based III-V group compound semiconductor layer arranged over said light-emitting layer.

16. The device according to claim 15, wherein said a texturing surface layer is arranged over said p-type gallium nitride-based III-V group compound semiconductor layer.

17. The device according to claim 16, wherein a transparent conductive oxide layer is arranged over said texturing surface layer.

18. The device according to claim 15, wherein said n-type gallium nitride-based III-V group compound semiconductor layer further having an ohmic contact area with texturing surface and is electrically coupling with said ohmic contact area with texturing surface.

19. The device according to claim 18, wherein a first electrode is electrically coupling with said ohmic contact area with texturing surface of said n-type gallium nitride-based III-V group compound semiconductor layer.

20. The device according to claim 17, wherein a second electrode is electrically coupling with said transparent conductive oxide layer.

21. The device according to claim 15, wherein said texturing surface layer is formed during the growth of epitaxy.

22. The device according to claim 18, wherein said said ohmic contact area with texturing surface of said n-type gallium nitride-based III-V group compound semiconductor layer is formed by etching part of said texturing surface layer, said p-type gallium nitride-based III-V group compound semiconductor layer, said light-emitting layer and said n-type gallium nitride-based III-V group compound semiconductor layer during a manufacturing process of chips.

23. The device according to claim 15, wherein said transparent conductive oxide layer is made of an indium oxide, tin oxide, indium molybdenum oxide, indium cerium oxide, zinc oxide, indium zinc oxide, magnesium zinc oxide, tin cadmium oxide, or indium tin oxide.