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Flash EEPROM with metal floating gate electrode

  • US 20060054943A1
  • Filed: 09/14/2004
  • Published: 03/16/2006
  • Est. Priority Date: 09/14/2004
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • a substrate including isolation regions and active regions;

    a floating gate stack proximate the substrate, the floating gate stack comprising;

    a first high-k dielectric layer proximate the substrate;

    a first metal layer proximate the first high-k dielectric layer; and

    a second high-k dielectric layer proximate the first metal layer; and

    a control gate electrode proximate the floating gate stack.

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