Volatile storage based power loss recovery mechanism

• US 20060059385A1
• Filed: 09/02/2004
• Published: 03/16/2006
• Est. Priority Date: 09/02/2004
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Eilert, Sean S., Atri, Sunil R.
• Granted Patent: US 8,032,787 B2
• Time in Patent Office: Days
• US Class Current: 714/14
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G11C 14/00 Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
• CPC Class Codes: G11C 16/102 External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
• CPC Class Codes: G11C 5/141 Battery and back-up supplies

Abstract

According to some embodiments, power loss recovery information related to an active operation is stored in volatile memory. Upon detection of a power loss condition, the power loss recovery information is copied to non-volatile memory. Upon a return of power, the power loss recovery information is used to complete or correct the interrupted operation.

Claims

1. A method comprising:

storing power loss recovery information related to an active operation in non-volatile storage in response to detection of a power loss condition.

2. The method as recited in claim 1, further comprising:

storing the power loss recovery information in volatile storage during the active operation.

3. The method as recited in claim 2, wherein the storing the power loss recovery information in the non-volatile storage comprises copying the power loss recovery information from the volatile storage.

4. The method as recited in claim 1, further comprising:

copying the power loss recovery information to volatile storage from the non-volatile storage upon power recovery.

5. The method as recited in claim 1, further comprising:

storing a charge prior to the power loss condition to provide power for the copying the power loss recovery information to non-volatile storage.

6. The method as recited in claim 1, wherein the active operation comprises a block write operation to a large non-volatile memory array.

7. The method as recited in claim 1, wherein the power loss recovery information includes a status bit indicating the active operation has not completed.

8. The method as recited in claim 1, wherein the power loss recovery information includes one or more address bits of the active operation.

9. The method as recited in claim 1, wherein the power loss recovery information includes a status bit indicating a completion status of the active operation.

10. The method as recited in claim 1, wherein the power loss recovery information includes a current random number generated by a security application.

11. The method as recited in claim 1, wherein the power loss recovery information includes information that is updated frequently during normal operation and that must be retained upon the detection of the power loss condition.

12. The method as recited in claim 1, wherein the non-volatile memory includes a flash memory array.

13. The method as recited in claim 1, wherein the non-volatile memory includes a polymer memory array.

14. The method as recited in claim 1, wherein the non-volatile memory includes a phase change memory array.

15. The method as recited in claim 1, further comprising utilizing the power loss recovery information to complete the active operation upon a return of power.

16. The method as recited in claim 15, wherein the power loss recovery information is read directly from the non-volatile memory.

17. The method as recited in claim 15, further comprising copying the power loss recovery information to volatile storage from the non-volatile storage upon power recovery prior to the utilizing the power loss recovery information.

18. The method as recited in claim 1, wherein the active operation is a format information write operation.

19. An apparatus comprising:

volatile storage to store power loss recovery information related to an active operation;

non-volatile storage; and

a controller to copy the power loss recovery information from the volatile storage to the non-volatile storage upon detection of a power loss condition.

20. The apparatus as recited in claim 19, further comprising:

a charge storage to store a charge prior to the detection of the power loss condition, the charge to power the controller during the power loss condition.

21. The apparatus as recited in claim 19, the controller further to copy the power loss recovery information to the volatile storage from the non-volatile storage upon power recovery.

22. The apparatus as recited in claim 19, wherein the active operation comprises a block write operation to a large non-volatile memory array.

23. The apparatus as recited in claim 19, wherein the power loss recovery information includes a status bit indicating the active operation has not completed.

24. The apparatus as recited in claim 19, wherein the power loss recovery information includes one or more address bits of the active operation.

25. The apparatus as recited in claim 19, wherein the power loss recovery information includes a status bit indicating a completion status of the active operation.

26. The apparatus as recited in claim 19, wherein the power loss recovery information includes a current random number generated by a security application.

27. The apparatus as recited in claim 19, wherein the power loss recovery information includes information that is updated frequently during normal operation and that must be retained upon the detection of the power loss condition.

28. The apparatus as recited in claim 19, wherein the non-volatile memory includes a flash memory array.

29. The apparatus as recited in claim 19, wherein the non-volatile memory includes a polymer memory array.

30. The apparatus as recited in claim 19, wherein the power loss recovery information is used to complete the active operation upon a return of power.

31. The apparatus as recited in claim 29, wherein the power loss recovery information used to complete the active operation is read directly from the non-volatile memory.

32. The apparatus as recited in claim 19, wherein the active operation is a format information write operation.

33. A system comprising:

a processor; and

a memory device coupled to the processor, the memory device comprising;

volatile storage to store power loss recovery information related to an active operation;

non-volatile storage; and

a controller to copy the power loss recovery information from the volatile storage to the non-volatile storage upon detection of a power loss condition.

34. The system as recited in claim 33, the memory device further comprising:

a charge storage to store a charge prior to the detection of the power loss condition, the charge to power the controller during the power loss condition.

35. The system as recited in claim 33, the controller further to copy the power loss recovery information to the volatile storage from the non-volatile storage upon power recovery.

36. The system as recited in claim 33, wherein the active operation comprises a block write operation to a large non-volatile memory array.

37. The system as recited in claim 33, wherein the power loss recovery information includes a status bit indicating the active operation has not completed.

38. The system as recited in claim 33, wherein the power loss recovery information includes one or more address bits of the active operation.

39. The system as recited in claim 33, wherein the power loss recovery information includes a status bit indicating a completion status of the active operation.

40. The system as recited in claim 33, wherein the power loss recovery information includes a current random number generated by a security application.

41. The system as recited in claim 33, wherein the non-volatile memory includes a flash memory array.

42. The system as recited in claim 33, wherein the non-volatile memory includes a polymer memory array.

43. The system as recited in claim 33, wherein the power loss recovery information is used to complete the active operation upon a return of power.

44. The system as recited in claim 33, wherein the active operation is a format information write operation.

45. The system as recited in claim 33, further comprising an antenna coupled to the processor.