High efficiency group III nitride-silicon carbide light emitting diode

• US 20060060877A1
• Filed: 09/22/2004
• Published: 03/23/2006
• Est. Priority Date: 09/22/2004
• Status: Active Grant

• Current Assignee: CREE Led Incorporated (Smart Global Holdings Incorporated)
• Original Assignee: CREE Incorporated (Wolfspeed, Inc.)
• Inventors: Edmond, John Adam, Slater, David Beardsley Jr., Bharathan, Jayesh
• Granted Patent: US 7,259,402 B2
• Time in Patent Office: Days
• US Class Current: 257/99
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/36 characterised by the electrodes

Abstract

A method and resulting structures are disclosed for fabricating a high efficiency high extraction light emitting diode suitable for packaging. The method includes the steps of adding a light emitting active portion of wide-bandgap semiconductor material to a conductive silicon carbide substrate, joining the added active portion to a conductive sub-mounting structure, and removing a portion of the silicon carbide substrate opposite the added active portion to thereby reduce the overall thickness of the joined substrate, active portion and sub-mounting structure. The resulting the sub-mounting structure can be joined to a lead frame with the active portion positioned between the silicon carbide substrate and the sub-mounting structure to thereby use the sub-mounting structure to separate the active portion from the lead frame and avoid undesired electrical contact between the active portion and the lead frame.

Claims

1. A wafer structure for high-efficiency inverted chip light emitting diode precursors, said wafer structure comprising:

a conductive silicon carbide substrate wafer;

at least one light-emitting active layer on said substrate;

at least one metal contact layer on said light emitting layer;

a conductive sub-mounting structure on said metal contact layer;

a plurality of ohmic contacts on the surface of said conductive silicon carbide substrate wafer that is opposite from said light emitting active layer, said ohmic contacts defining a plurality of light emitting diode precursors.

2. A wafer structure according to claim 1 wherein:

said conductive silicon carbide substrate wafer, said light-emitting active layer and said metal contact layer are physically separated into individual device precursors; and

said sub-mounting wafer remains undivided.

3. A wafer structure according to claim 2 and further comprising a passivation composition along the separated edges of said separated individual device precursors

4. A wafer structure according to claim 1 wherein said conductive silicon carbide substrate wafer is a single crystal and has a polytype selected from the group consisting of the 3C, 4H, 6H and 15R polytypes of silicon carbide.

5. A wafer structure according to claim 1 wherein said light-emitting active layer is a Group III nitride.

6. A wafer structure according to claim 1 wherein said light-emitting active layer is indium gallium nitride.

7. A wafer structure according to claim 1 comprising a plurality of metal contact layers.

8. A wafer structure according to claim 1 wherein said plurality of metal contact layers comprises:

a solder layer for joining said conductive silicon carbide substrate wafer to said conductive sub-mounting structure;

a silver layer for providing a mirror that enhances light extraction; and

a barrier layer on and surrounding said silver layer for preventing silver from said silver layer from migrating beyond said silver layer.

9. A wafer structure according to claim 8 wherein said barrier layer is selected from the group consisting of platinum, tungsten and titanium and layers and alloys thereof.

10. A wafer structure according to claim 7 wherein at least one metal contact layer is a mirror.

11. A wafer structure according to claim 7 comprising at least one conducting etch-stop layer.

12. A wafer structure according to claim 1 wherein said conductive sub-mounting structure is selected from the group consisting of metals and semiconductors.

13. A wafer structure according to claim 1 wherein said conductive sub-mounting structure comprises a silicon carbide wafer.

14. A wafer structure according to claim 1 wherein said conductive sub-mounting structure comprises a composite of at least two different materials.

15. A wafer structure according to claim 1 comprising an ohmic contact on said conductive sub-mounting structure opposite from said metal contact layer.

16. A wafer structure according to claim 15 having a total dimension between and including said ohmic contacts of no more than 100 microns

17. A wafer structure according to claim 1 wherein said silicon carbide single crystal wafer is no more than 25 microns thick between said ohmic contacts to said wafer and said active layer on said wafer.

18. A wafer structure according to claim 1 wherein said conductive silicon carbide wafer has a lenticular surface for increasing the light extraction from diodes separated from said wafer structure.

19. A method of fabricating a high efficiency high extraction light emitting diode suitable for packaging, the method comprising:

adding a light emitting active portion of wide-bandgap semiconductor material to a conductive silicon carbide substrate;

joining the added active portion to a conductive sub-mounting structure; and

removing a portion of the silicon carbide substrate opposite the added active portion to thereby reduce the overall thickness of the joined substrate, active portion and sub-mounting structure.

20. A fabricating method according to claim 19 comprising joining the sub-mounting structure to a lead frame with the active portion positioned between the silicon carbide substrate and the sub-mounting structure to thereby use the sub-mounting structure to separate the active portion from the lead frame and avoid undesired electrical contact between the active portion and the lead frame.

21. A fabricating method according to claim 19 wherein the step of adding the light emitting active portion comprises adding a Group III nitride semiconductor structure.

22. A fabricating method according to claim 21 comprising adding at least one layer of indium gallium nitride.

23. A fabricating method according to claim 19 further comprising:

adding at least one metal layer to the added active portion prior to the step of joining the active portion to the sub-mounting structure; and

joining the metal layer to the sub-mounting structure.

24. A fabricating method according to claim 19 wherein the step of joining the added active portion to a sub-mounting structure comprises joining the active portion to a metal or a conductive semiconductor.

25. A fabricating method according to claim 19 comprising passivating the light emitting active portion.

26. A fabricating method according to claim 19 comprising reducing the thickness of the sub-mounting structure following the step of joining the active structure to the sub-mounting structure.

27. A fabricating method according to claim 26 comprising positioning the conductive silicon carbide substrate on a temporary carrier prior to the step of reducing the thickness of the sub-mounting structure.

28. A fabricating method according to claim 19 comprising forming a lenticular surface on the reduced silicon carbide substrate.

29. A method of fabricating a high efficiency high extraction light emitting diode suitable for packaging, the method comprising:

adding a light emitting active layer of wide-bandgap semiconductor material to a conductive silicon carbide substrate wafer;

adding at least one metal contact layer to the added active layers;

joining the metal contact layer to a conductive sub-mounting wafer;

removing a portion of the silicon carbide substrate wafer opposite the added active layers to thereby reduce the overall thickness of the joined wafers;

adding ohmic contacts to the reduced silicon carbide substrate wafer and to the sub-mounting wafer to thereby define a plurality of individual diode precursors; and

separating the diode precursors into individual diodes.

30. A fabricating method according to claim 29 comprising joining the sub-mounting portion of the separated diodes to respective lead frames with the active layers positioned between the silicon carbide substrate and the sub-mounting structure to thereby use the sub-mounting structure to separate the active layers from the lead frame and avoid undesired electrical contact between the active layers and the lead frame.

31. A fabricating method according to claim 29 wherein the step of adding the light emitting active layer comprises adding a Group III nitride layer.

32. A fabricating method according to claim 31 comprising adding an indium gallium nitride layer.

33. A fabricating method according to claim 29 comprising forming a mesa structure that includes at least the metal contact wafer prior to the step of joining the substrate wafer to the sub-mounting wafer.

34. A fabricating method according to claim 33 comprising forming a mesa structure that includes at least a portion of the light emitting active layer.

35. A fabricating method according to claim 29 comprising forming a metal solder layer on the sub-mounting wafer prior to joining the silicon carbide substrate wafer to the sub-mounting wafer;

and

thereafter joining the metal contact layer on the silicon carbide substrate to the solder layer on the sub-mounting wafer.

36. A fabricating method according to claim 29 comprising partially separating portions of the diode precursors from one another while maintaining the sub-mounting wafer intact.

37. A fabricating method according to claim 36 comprising etching the wafer to partially separate the diode precursors.

38. A fabricating method according to claim 36 comprising sawing the wafer to partially separate the diode precursors.

39. A fabricating method according to claim 36 comprising laser cutting to partially separate the diode precursors.

40. A fabricating method according to claim 36 comprising water jet cutting to partially separate the diode precursors.

41. A fabricating method according to claim 36 comprising implant isolating the partially separated diode precursors.

42. A fabricating method according to claim 36 comprising passivating the edges of the partially separated diode precursors.

43. A fabricating method according to claim 36 comprising testing the partially separated diode precursors.

44. A fabricating method according to claim 29 comprising removing a portion of the joined sub-mounting wafer opposite the active layer to further reduce the overall thickness of the joined substrate wafer and sub-mounting wafer.

45. A fabricating method according to claim 29 comprising:

positioning the joined conductive silicon carbide substrate wafer and the sub-mounting wafer on a temporary carrier with the side of the conductive silicon carbide wafer opposite the active layer being the side on the temporary carrier;

reducing the thickness of the sub-mounting layer while the joined wafers are on the temporary carrier; and

removing the joined wafers from the temporary carrier.

46. A fabricating method according to claim 45 wherein the step of positioning the joined conductive silicon carbide wafer and the sub-mounting wafer on a temporary carrier comprises positioning the joined wafers on grinding tape.

47. A fabricating method according to claim 45 wherein the step of positioning the joined conductive silicon carbide wafer and the sub-mounting wafer on a temporary carrier comprises attaching the joined wafers to a planar structure with a temporary bonding media.

48. A method of fabricating a high efficiency high extraction light emitting diode suitable for packaging, the method comprising:

adding a light emitting active layer of wide-bandgap semiconductor material to a conductive silicon carbide substrate wafer;

joining the added active layer to a conductive sub-mounting wafer;

adding ohmic contacts to the silicon carbide substrate wafer and to the sub-mounting wafer to thereby define a plurality of individual diode precursors; and

separating the diode precursors into individual diodes.

49. A fabricating method according to claim 48 comprising joining the sub-mounting portion of the separated diodes to respective lead frames with the active layers positioned between the silicon carbide substrate and the sub-mounting structure to thereby use the sub-mounting structure to separate the active layers from the lead frame and avoid undesired electrical contact between the active layers and the lead frame.

50. A fabricating method according to claim 48 wherein the step of adding a light emitting active layer comprises adding a Group III nitride layer.

51. A fabricating method according to claim 50 comprising adding a layer of indium gallium nitride.

52. A fabricating method according to claim 48 comprising partially separating portions of the diode precursors from one another while maintaining the sub-mounting wafer intact.

53. A fabricating method according to claim 52 comprising etching the wafer to partially separate the diode precursors.

54. A fabricating method according to claim 52 comprising sawing the wafer to partially separate the diode precursors.

55. A fabricating method according to claim 52 comprising laser cutting to partially separate the diode precursors.

56. A fabricating method according to claim 52 comprising water jet cutting to partially separate the diode precursors.

57. A fabricating method according to claim 52 comprising implant isolating the partially separated diode precursors.

58. A fabricating method according to claim 52 comprising passivating the edges of the partially separated diode precursors.

59. A fabricating method according to claim 52 comprising testing the partially separated diode precursors.