Dual panel-type organic electroluminescent display device and method for manufacturing the same

• US 20060061262A1
• Filed: 06/21/2005
• Published: 03/23/2006
• Est. Priority Date: 09/17/2004
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Yoo, Choong-Keun, Lee, Kwang-Yeon
• Granted Patent: US 7,683,538 B2
• Time in Patent Office: Days
• US Class Current: 313/503
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 59/122 Pixel-defining structures or layers, e.g. banks
• CPC Class Codes: H10K 59/1275 Electrical connections of the two substrates

Abstract

A dual panel-type organic electroluminescent display device includes a first substrate on which gate and data lines cross each other to define sub-pixels. Array elements are disposed at the sub-pixels on the first substrate. A first electrode is disposed on substantially the entire surface of a second substrate opposing the first substrate. An insulating pattern is disposed on the first electrode, an organic electroluminescent layer is disposed on the first electrode, and a second electrode is disposed on the organic electroluminescent layer at each sub-pixel. A connection pattern connects the array element and the second electrode at each sub-pixel. The connection pattern contacts the second electrode under the insulating pattern.

Claims

1. A dual panel-type organic electroluminescent display device, comprising:

a first substrate having gate and data lines crossing each other thereon to define sub-pixels;

an array element disposed on the first substrate at at least one of the sub-pixels;

a second substrate opposing the first substrate;

a first electrode disposed on substantially an entire surface of the second substrate;

an insulating pattern disposed on the first electrode at the at least one of the sub-pixels;

an organic electroluminescent layer disposed on the first electrode within the at least one of the sub-pixels;

a second electrode disposed on the organic electroluminescent layer at the at least one of the sub-pixels; and

a connection pattern electrically connecting the array element and the second electrode and having a contact area contacting the second electrode, the insulating pattern between the first and second electrodes at the contact area.

2. The device according to claim 1, wherein the array element includes a connection electrode contacting the connection pattern.

3. The device according to claim 2, wherein the array element includes a switching thin film transistor and a driving thin film transistor.

4. The device according to claim 3, wherein the connection electrode is connected to a drain electrode of the driving thin film transistor.

5. The device according to claim 3, wherein the connection electrode extends from a drain electrode of the driving thin film transistor.

6. The device according to claim 1, wherein the insulating pattern has a first width and has a matrix form.

7. The device according to claim 6, further comprising a partition wall on the insulating pattern, the partition wall having a second width narrower than the first width of the insulating pattern to expose a portion of the insulating pattern inside the sub-pixel.

8. The device according to claim 7, wherein the second electrode covers the portion of the insulating pattern inside the sub-pixel.

9. The device according to claim 8, wherein the portion of the insulating pattern inside the sub-pixel is wider than the contact area of the connection pattern.

10. The device according to claim 1, wherein the insulating pattern has a larger size than the contact area of the connection pattern.

11. The device according to claim 1, wherein the contact area of the connection pattern is within a range of about 10 μ

m² to about 20 μ

m².

12. The device according to claim 1, wherein the connection pattern is formed of a ductile conductive material.

13. The device according to claim 1, wherein the connection pattern is formed of an organic material and a conductive material covering the organic material.

14. The device according to claim 1, wherein the first electrode has a work function higher than the second electrode and is formed of a transparent conductive material.

15. The device according to claim 1, wherein the second electrode has a work function smaller than the first electrode and is formed of an opaque conductive material.

16. The device according to claim 1, wherein an organic electroluminescent layer is disposed within each sub-pixel, each organic electroluminescent layer includes a hole injection layer, a hole transporting layer, an electron injection layer, an electron transporting layer, and a red, green or blue emission layer.

17. The device according to claim 1, further comprising a seal pattern on a peripheral portion of the first and second substrates.

18. The device according to claim 1, wherein the organic electroluminescent layer is disposed between the insulating pattern and the connection pattern.

19. A method for manufacturing a dual panel-type organic electroluminescent display device, the method comprising:

forming gate and data lines crossing each other on a first substrate to define sub-pixels;

forming an array element at at least one of the sub-pixels on the first substrate, the array element including a switching thin film transistor and a driving thin film transistor;

forming a first electrode on substantially an entire surface of a second substrate;

forming an insulating pattern on the first electrode at the at least one of the sub-pixels;

forming organic electroluminescent layers on the first electrode within the at least one of the sub-pixels;

forming a second electrode on the organic electroluminescent layer at the at least one of the sub-pixels;

forming a connection pattern connected to the driving thin film transistor at the at least one of the sub-pixels; and

attaching the first and second substrates such that the connection pattern contacts the second electrode on the insulating pattern.

20. The method according to claim 19, further comprising forming a connection electrode connected to the driving thin film transistor and the connection pattern.

21. The method according to claim 20, wherein the connection electrode is electrically connected to a drain electrode of the driving thin film transistor.

22. The method according to claim 19, wherein the insulating pattern has a first width and has a matrix form.

23. The method according to claim 22, further comprising forming a partition wall on the insulating pattern, the partition wall having a second width narrower than the first width of the insulating pattern to expose a portion of the insulating pattern inside the sub-pixel.

24. The method according to claim 23, wherein the second electrode covers the portion of the insulating pattern inside the sub-pixel.

25. The method according to claim 19, wherein the organic electroluminescent layer is formed by a deposition method using a shadow mask such that the organic electroluminescent layer does not overlap the insulating pattern.

26. The method according to claim 19, wherein the second electrode is larger than the organic electroluminescent layer at the at least one of the sub-pixels.

27. The method according to claim 19, further comprising forming a seal pattern on a peripheral portion of the first and second substrates.

28. The method according to claim 19, wherein the organic electroluminescent layer is disposed between the insulating pattern and the connection pattern.

29. A dual panel-type organic electroluminescent display device, comprising:

a first substrate having gate and data lines crossing each other thereon to define sub-pixels;

an array element disposed on the first substrate;

a second substrate opposing the first substrate;

a first electrode disposed on the second substrate;

an organic electroluminescent layer disposed on the first electrode;

a second electrode disposed on the organic electroluminescent layer; and

a connection pattern electrically connecting the array element and the second electrode, the connection pattern contacting the second electrode at a position in a sub-pixel outside of a display region.

30. The device according to claim 29, wherein an array element, a first electrode, an organic electroluminescent layer, a second electrode, and a connection pattern are disposed at each sub-pixel.

31. The device according to claim 30, wherein adjacent second electrodes are separated by a vacuum.

32. The device according to claim 30, further comprising an insulating partition wall separating adjacent second electrodes.

33. The device according to claim 32, wherein the connection pattern is adjacent to the insulating partition wall.

34. The device according to claim 30, wherein adjacent array elements are separated by a vacuum.

35. The device according to claim 29, wherein the array element includes a switching thin film transistor and a driving thin film transistor, and the connection electrode is connected to a drain electrode of the driving thin film transistor.

36. The device according to claim 29, wherein the connection pattern is formed of a ductile conductive material.

37. The device according to claim 29, wherein the connection pattern is formed of an organic material and a conductive material covering the organic material.

38. The device according to claim 29, wherein the first electrode has a work function higher than the second electrode and is formed of a transparent conductive material.

39. The device according to claim 29, further comprising a seal pattern on a peripheral portion of the first and second substrates.

40. The device according to claim 29, wherein the organic electroluminescent layer is not disposed between the first and second electrodes at the position where the connection pattern contacts the second electrode.

41. The device according to claim 29, wherein the second electrode has a work function smaller than the first electrode and is formed of an opaque conductive material.

42. The device according to claim 29, wherein the organic electroluminescent layer is disposed between the insulating pattern and the connection pattern.