Liquid crystal display device and method of driving the same
First Claim
1. A liquid crystal display device comprising:
- a substrate, including a plurality of data lines, a plurality of gate lines for receiving gate signals, a first group of a plurality of pixels, a second group of a plurality of pixels, and a pixel array comprising a plurality of pixels selected from the first group of a plurality of pixels and the second group of a plurality of pixels configured in a plurality of rows and a plurality of columns across the substrate, such that two pixels adjacent to each other are paired to share a data line selected from the plurality of data lines;
a first gate drive circuit including a first to an nth shift registers that output first gate signals; and
a second gate drive circuit including a first to an nth shift registers that output a second gate signals, wherein the first gate drive circuit and the second gate drive circuit are arranged on the substrate and operate independently of one another.
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Accused Products
Abstract
Disclosed herein are a liquid crystal display device, in which a bi-directional internal gate drive circuit is used to cut the number of data lines in half, and a method of driving such liquid crystal display devices. The liquid crystal device includes a pixel array having a plurality of pixels on a lower substrate. The pixels are configured such that two pixels horizontally adjacent to each other are paired to share the same data line. First and second gate drive circuits are housed in the left and right sides of the lower substrate so as to be independently operated in the left and right side of the pixel array. The first gate drive circuit is formed of first to nth odd shift registers, and the second gate drive circuit is formed of first to nth even shift registers.
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Citations
16 Claims
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1. A liquid crystal display device comprising:
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a substrate, including a plurality of data lines, a plurality of gate lines for receiving gate signals, a first group of a plurality of pixels, a second group of a plurality of pixels, and a pixel array comprising a plurality of pixels selected from the first group of a plurality of pixels and the second group of a plurality of pixels configured in a plurality of rows and a plurality of columns across the substrate, such that two pixels adjacent to each other are paired to share a data line selected from the plurality of data lines;
a first gate drive circuit including a first to an nth shift registers that output first gate signals; and
a second gate drive circuit including a first to an nth shift registers that output a second gate signals, wherein the first gate drive circuit and the second gate drive circuit are arranged on the substrate and operate independently of one another. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A liquid crystal display device comprising:
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a pixel array arranged on a substrate including a plurality of data lines, a plurality of gate lines, a first group of a plurality of pixels and a second group of a plurality of pixels;
a first gate drive circuit including a first to an nth shift registers;
a second gate drive circuit including a first to an nth shift registers, wherein the first group drive circuit and the second group drive circuit operate independently such that the first gate drive circuit drives the first group of a plurality of pixels, and the second gate drive circuit drives the second group of a plurality of pixels. - View Dependent Claims (11, 12, 13)
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14. A method of driving a liquid crystal display device comprising:
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connecting a first gate drive circuit comprising a plurality of shift register stages arranged from a first stage to an nth stage, in cascade to sequentially output an output signal through an output signal line by using a first voltage supply source, a second voltage supply source, a previous shift register stage'"'"'s output signal, a next shift register'"'"'s output signal, and two of a plurality of clock signals;
connecting a second gate drive circuit comprising a plurality of shift register stages arranged from a first stage to an nth stage, in cascade to sequentially output an output signal through an output signal line by using a first voltage supply source, a second voltage supply source, a previous shift register stage'"'"'s output signal, a next shift register'"'"'s output signal, and two of a plurality of clock signals;
connecting a substrate, including a plurality of data lines, a plurality of gate lines for receiving gate signals, a first group of a plurality of pixels, a second group of a plurality of pixels, and a pixel array comprising a plurality of pixels selected from the first group of a plurality of pixels and the second group of a plurality of pixels;
driving at least one of the pixel array pixels selected from the first group of a plurality of pixels with a signal sequentially output by the shift registers included in the first gate drive circuit;
waiting a predetermined amount of time; and
driving at least one of the pixel array pixels selected from the second group of a plurality of pixels with a signal output sequentially by the shift registers included in the second gate drive circuit. - View Dependent Claims (15, 16)
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Specification