Liquid crystal display device and method of driving the same

• US 20060061535A1
• Filed: 06/30/2005
• Published: 03/23/2006
• Est. Priority Date: 09/23/2004
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Kim, Binn, Yoon, Soo Young, Moon, Su Hwan
• Granted Patent: US 7,839,374 B2
• Time in Patent Office: Days
• US Class Current: 345/98
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2310/0205 Simultaneous scanning of several lines in flat panels
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G11C 19/184 with field-effect transistors, e.g. MOS-FET
• CPC Class Codes: G11C 19/28 using semiconductor elements G11C19/14, G11C19/36 take precedence

Abstract

Disclosed herein are a liquid crystal display device, in which a bi-directional internal gate drive circuit is used to cut the number of data lines in half, and a method of driving such liquid crystal display devices. The liquid crystal device includes a pixel array having a plurality of pixels on a lower substrate. The pixels are configured such that two pixels horizontally adjacent to each other are paired to share the same data line. First and second gate drive circuits are housed in the left and right sides of the lower substrate so as to be independently operated in the left and right side of the pixel array. The first gate drive circuit is formed of first to n^th odd shift registers, and the second gate drive circuit is formed of first to n^th even shift registers.

Claims

1. A liquid crystal display device comprising:

a substrate, including a plurality of data lines, a plurality of gate lines for receiving gate signals, a first group of a plurality of pixels, a second group of a plurality of pixels, and a pixel array comprising a plurality of pixels selected from the first group of a plurality of pixels and the second group of a plurality of pixels configured in a plurality of rows and a plurality of columns across the substrate, such that two pixels adjacent to each other are paired to share a data line selected from the plurality of data lines;

a first gate drive circuit including a first to an n^th shift registers that output first gate signals; and

a second gate drive circuit including a first to an n^th shift registers that output a second gate signals,

wherein the first gate drive circuit and the second gate drive circuit are arranged on the substrate and operate independently of one another.

2. The liquid crystal display device as set forth in claim 1, wherein the first node is a Q node.

3. The liquid crystal display device as set forth in claim 1, wherein, adjacent pixels that share a data line include a pixel selected from the first group of a plurality of pixels and a pixel selected from the second group of a plurality of pixels, and a gate line driving pixels selected from the first group of a plurality of pixels and a gate line driving pixels selected from the second group of a plurality of pixels are arranged between each of the plurality of rows of pixels.

4. The liquid crystal display device as set forth in claim 3, wherein each pixel included within the pixel array is connected to a switching element for applying a data signal thereto, a drain electrode of the switching element is connected to a data line, and a source electrode thereof is connected to each pixel electrode.

5. The liquid crystal display device as set forth in claim 1, wherein the number of the data lines is half the number of horizontally arranged pixels.

6. The liquid crystal display device as set forth in claim 1, wherein the first to the n^th shift registers of the first gate driver circuit are configured so as to output a gate signal to gate lines selected from the plurality of gate lines that drive pixels selected from the first group of a plurality of pixels.

7. The liquid crystal display device as set forth in claim 1, wherein the first to the n^th shift registers of the second gate drive circuit are configured so as to output a gate signal to gate lines selected from the plurality of gate lines that drive pixels selected from the second group of a plurality of pixels

8. The liquid crystal display device as set forth in claim 1, wherein each of the shift resistors includes:

a first switch having a source connected to a first node and a gate and drain commonly connected to an output signal of a previous shift register;

a second switch having a gate connected to the output signal of the previous stage, a drain connected to a second node, and a source connected to a first supply voltage;

a third switch having a gate connected to the first node, a drain connected to the second node, and a source connected to the first supply voltage;

a fourth switch having a gate connected to the first node, a drain connected to one of a first and second clock, and a source connected to an output signal of a current stage;

a fifth switch having a gate connected to one of a third and fourth clock, a drain connected to a second supply voltage, and a source connected to the second node;

a sixth switch having a gate connected to the second node, a drain connected to a first node, and a source connected to the first supply voltage;

a seventh switch having a gate connected to an output signal of a subsequent stage, a drain connected to the first node, and a source connected to the first supply voltage; and

an eighth switch having a gate connected to the second node, a drain connected to the output signal of the current stage, and a source connected to the first supply voltage.

9. The liquid crystal display device as set forth in claim 8, wherein each transistor of the shift register is an amorphous silicon transistor.

10. A liquid crystal display device comprising:

a pixel array arranged on a substrate including a plurality of data lines, a plurality of gate lines, a first group of a plurality of pixels and a second group of a plurality of pixels;

a first gate drive circuit including a first to an n^th shift registers;

a second gate drive circuit including a first to an n^th shift registers,

wherein the first group drive circuit and the second group drive circuit operate independently such that the first gate drive circuit drives the first group of a plurality of pixels, and the second gate drive circuit drives the second group of a plurality of pixels.

11. The liquid crystal display device of claim 10, wherein each element of the pixel array is a pair of pixels that share one of the plurality of data lines, one pixel selected from the first group of a plurality of pixels and the other pixel selected from the second group of a plurality of pixels.

12. The liquid crystal display device of claim 11, wherein a pixel selected from the first group of a plurality of pixels is not adjacent to another pixel selected from the first group of a plurality of pixels.

13. The liquid crystal display device of claim 11, wherein a pixel selected from the second group of a plurality of pixels is not adjacent to another pixel selected from the second group of a plurality of pixels.

14. A method of driving a liquid crystal display device comprising:

connecting a first gate drive circuit comprising a plurality of shift register stages arranged from a first stage to an n^th stage, in cascade to sequentially output an output signal through an output signal line by using a first voltage supply source, a second voltage supply source, a previous shift register stage'"'"'s output signal, a next shift register'"'"'s output signal, and two of a plurality of clock signals;

connecting a second gate drive circuit comprising a plurality of shift register stages arranged from a first stage to an n^th stage, in cascade to sequentially output an output signal through an output signal line by using a first voltage supply source, a second voltage supply source, a previous shift register stage'"'"'s output signal, a next shift register'"'"'s output signal, and two of a plurality of clock signals;

connecting a substrate, including a plurality of data lines, a plurality of gate lines for receiving gate signals, a first group of a plurality of pixels, a second group of a plurality of pixels, and a pixel array comprising a plurality of pixels selected from the first group of a plurality of pixels and the second group of a plurality of pixels;

driving at least one of the pixel array pixels selected from the first group of a plurality of pixels with a signal sequentially output by the shift registers included in the first gate drive circuit;

waiting a predetermined amount of time; and

driving at least one of the pixel array pixels selected from the second group of a plurality of pixels with a signal output sequentially by the shift registers included in the second gate drive circuit.

15. The method of driving a liquid crystal display device of claim 14, wherein the predetermined amount of time is about one-fourth of a period.

16. The method of driving a liquid crystal display device of claim 14, wherein each signal output by the first date drive circuit and the second drive gate circuit has a time duration of about one-half period.