Method for manufacturing semiconductor device

• US 20060063309A1
• Filed: 09/20/2005
• Published: 03/23/2006
• Est. Priority Date: 09/21/2004
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Sugiyama, Eiji, Ito, Kyosuke
• Granted Patent: US 7,354,801 B2
• Time in Patent Office: Days
• US Class Current: 438/118
• CPC Class Codes: H01L 21/7806 involving the separation of the active layers from a substrate
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate

Abstract

In the case where an integrated circuit formed of a thin film is formed over a substrate and peeled from the substrate, a fissure (also referred to as crack) is generated in the integrated circuit in some cases. The present invention is to restrain the generation of a fissure by fixing the proceeding direction of etching in one direction to make a peeled layer warp in one direction in accordance with the proceeding of etching. For example, the proceeding of etching can be controlled by utilizing the fact that a portion where a substrate is in contact with a base insulating layer is not etched in the case of patterning a peeling layer provided over the substrate, then forming the base insulating layer, and then fixing a peeled layer by the portion where the substrate is in contact with the base insulating layer.

Claims

1. A method for manufacturing a semiconductor device comprising:

forming a peeling layer over a first substrate;

forming a base insulating layer over the peeling layer and the first substrate;

forming at least one thin film integrated circuit over the peeling layer with the base insulating layer interposed therebetween;

forming a protective layer covering the thin film integrated circuit;

exposing an edge of the peeling layer by removing the base insulating layer selectively;

etching the peeling layer; and

transferring the thin film integrated circuit to a second substrate,

wherein the etching is proceeded in one direction from the exposed edge of peeling layer, and

wherein an adhesive material is provided on the second substrate.

2. A method for manufacturing a semiconductor device according to claim 1, wherein other edges of the peeling layer except for the exposed edge of the peeling layer are covered by the base insulating film.

3. A method for manufacturing a semiconductor device according to claim 1, wherein a top surface of the thin film integrated circuit is a rectangular shape and the exposed edge of peeling layer is located in parallel to one side or two opposing sides of the thin film integrated circuit.

4. A method for manufacturing a semiconductor device according to claim 1, wherein the base insulating layer comprises a material which does not react chemically with gas or liquid containing fluorine halide.

5. A method for manufacturing a semiconductor device according to claim 1, wherein the protective layer is comprises a material which does not react chemically with gas or liquid containing fluorine halide.

6. A method for manufacturing a semiconductor device comprising:

forming a peeling layer over a first substrate;

forming a base insulating layer over the peeling layer and the first substrate;

forming at least one thin film integrated circuit over the peeling layer with the base insulating layer interposed therebetween;

forming a protective layer covering the thin film integrated circuit;

exposing first and second edges of the peeling layer by removing the base insulating layer selectively;

etching the peeling layers; and

transferring the thin film integrated circuit to a second substrate,

wherein the first and second edges of the peeling layer are opposed to each other,

wherein the etching is proceeded in one direction from the exposed first and second edges of peeling layer, and

wherein an adhesive material is provided on the second substrate.

7. A method for manufacturing a semiconductor device according to claim 6, wherein other edges of the peeling layer except for the exposed edge of the peeling layer are covered by the base insulating film.

8. A method for manufacturing a semiconductor device according to claim 6, wherein a top surface of the thin film integrated circuit is a rectangular shape and the exposed edge of peeling layer is located in parallel to one side or two opposing sides of the thin film integrated circuit.

9. A method for manufacturing a semiconductor device according to claim 6, wherein the base insulating layer comprises a material which does not react chemically with gas or liquid containing fluorine halide.

10. A method for manufacturing a semiconductor device according to claim 6, wherein the protective layer is comprises a material which does not react chemically with gas or liquid containing fluorine halide.

11. A method for manufacturing a semiconductor device comprising:

forming a peeling layer over a first substrate;

forming at least first and second peeling layers by removing the peeling layer selectively;

forming a base insulating layer over the first and second peeling layers and the first substrate;

forming a first thin film integrated circuit over the first peeling layer with the base insulating layer interposed therebetween and a second thin film integrated circuit over the second peeling layer with the base insulating layer interposed therebetween;

forming a first protective layer covering the first thin film integrated circuit and a second protective layer covering the second thin film integrated circuit;

exposing an edge of the first peeling layer and an edge of the second peeling layer by removing the base insulating layer selectively;

etching the first and second peeling layers; and

transferring the first and second thin film integrated circuits to a second substrate,

wherein the edge of the second peeling layer is exposed between the first and second thin film integrated circuits,

wherein the etching is proceeded in one direction from the exposed edge of the first peeling layer and the exposed edge of the second peeling layer, and

wherein an adhesive material is provided on the second substrate.

12. A method for manufacturing a semiconductor device according to claim 11, wherein the method further comprises dividing the first and second thin film integrated circuits into the individual pieces after the transferring step.

13. A method for manufacturing a semiconductor device according to claim 11, wherein other edges of the first peeling layer except for the exposed edge of the first peeling layer are covered by the base insulating film.

14. A method for manufacturing a semiconductor device according to claim 11, wherein other edges of the second peeling layer except for the exposed edge of the second peeling layer are covered by the base insulating film.

15. A method for manufacturing a semiconductor device according to claim 11, wherein each top surface of the first and second thin film integrated circuits is a rectangular shape and each the exposed edges of first and second peeling layer is located in parallel to one side or two opposing sides of the thin film integrated circuit.

16. A method for manufacturing a semiconductor device according to claim 11, wherein the base insulating layer comprises a material which does not react chemically with gas or liquid containing fluorine halide.

17. A method for manufacturing a semiconductor device according to claim 11, wherein the protective layer is comprises a material which does not react chemically with gas or liquid containing fluorine halide.

18. A method for manufacturing a semiconductor device comprising:

forming a peeling layer over a first substrate;

forming at least first and second peeling layers by removing the peeling layer selectively;

forming a base insulating layer over the first and second peeling layers and the first substrate;

forming a first thin film integrated circuit over the first peeling layer with the base insulating layer interposed therebetween and a second thin film integrated circuit over the second peeling layer with the base insulating layer interposed therebetween;

forming a first protective layer covering the first thin film integrated circuit and a second protective layer covering the second thin film integrated circuit;

exposing an edge of the first peeling layer and an edge of the second peeling layer by removing the base insulating layer selectively;

etching the first and second peeling layers; and

interposing the first and second thin film integrated circuits between a first film and a second film by thermocompressing,

wherein the edge of the second peeling layer is exposed between the first thin film integrated circuit and the second thin film integrated circuit,

wherein the etching is proceeded in one direction from the exposed edge of the first peeling layer and the exposed edge of the second peeling layer, and

wherein an adhesive material is provided on the second substrate.

19. A method for manufacturing a semiconductor device according to claim 18, the method further comprises dividing the first and second thin film integrated circuits into the individual pieces after the interposing step.

20. A method for manufacturing a semiconductor device according to claim 18, wherein other edges of the first peeling layer except for the exposed edge of the first peeling layer are covered by the base insulating film.

21. A method for manufacturing a semiconductor device according to claim 18, wherein other edges of the second peeling layer except for the exposed edge of the second peeling layer are covered by the base insulating film.

22. A method for manufacturing a semiconductor device according to claim 18, wherein each top surface of the first and second thin film integrated circuits is a rectangular shape and each the exposed edges of first and second peeling layer is located in parallel to one side or two opposing sides of the thin film integrated circuit.

23. A method for manufacturing a semiconductor device according to claim 18, wherein the base insulating layer comprises a material which does not react chemically with gas or liquid containing fluorine halide.

24. A method for manufacturing a semiconductor device according to claim 18, wherein the protective layer is comprises a material which does not react chemically with gas or liquid containing fluorine halide.

25. A method for manufacturing a semiconductor device comprising:

forming a peeling layer over a first substrate;

forming a base insulating layer over the peeling layer;

forming at least first and second thin film integrated circuits over the peeling layer;

forming a protective layer for covering the first and second thin film integrated circuits;

exposing first and second edges of the peeling layer by selectively removing the base insulating layer;

partially etching the peeling layer, thereby making a part of the peeling layer remained between the first and second thin film integrated circuits; and

transferring first and second thin film integrated circuits to a second substrate,

wherein an adhesive material is provided on the second substrate.

26. A method for manufacturing a semiconductor device according to claim 25, wherein the method further comprises dividing the first and second thin film integrated circuits into the individual pieces after the transferring step.

27. A method for manufacturing a semiconductor device according to claim 25, wherein the base insulating layer comprises a material which does not react chemically with gas or liquid containing fluorine halide.

28. A method for manufacturing a semiconductor device according to claim 25, wherein the protective layer is comprises a material which does not react chemically with gas or liquid containing fluorine halide.

29. A method for manufacturing a semiconductor device according to claim 25, wherein the first and second edges of the peeling layer are opposed to each other.