Semiconductor device and method of manufacturing the same

• US 20060063319A1
• Filed: 06/06/2005
• Published: 03/23/2006
• Est. Priority Date: 09/21/2004
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Ono, Mizuki
• Granted Patent: US 7,465,998 B2
• Time in Patent Office: Days
• US Class Current: 438/197
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/42392 fully surrounding the channel, e.g. gate-all-around
• CPC Class Codes: H01L 29/66795 with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
• CPC Class Codes: H01L 29/7854 with rounded corners
• CPC Class Codes: H01L 29/78645 with multiple gate
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device includes a plate of semiconductor layer, an insulator layer formed on the plate of semiconductor layer and brought into contact with the plate of semiconductor layer by at least two adjacent faces, a thickness of the insulator layer in the vicinity of a boundary line between the two adjacent faces being larger than that of the insulator layer in a region other than the vicinity of the boundary line, and a band of conductor layer formed facing a middle portion of the plate-like semiconductor layer via the insulator layer.

Claims

1. A semiconductor device comprising:

a plate of semiconductor layer;

an insulator layer formed on the plate-like semiconductor layer and brought into contact with the plate-like semiconductor layer by at least two adjacent faces, a thickness of the insulator layer in the vicinity of a boundary line between the two adjacent faces being larger than that of the insulator layer in a region other than the vicinity of the boundary line; and

a band of conductor layer formed facing a middle portion of the plate-like semiconductor layer via the insulator layer.

2. The semiconductor device according to claim 1, further comprising:

a pair of conductive regions formed in opposite side portions between which the middle portion of the plate of semiconductor layer is held, opposite end portions facing each other inside the pair of conductive regions including regions overlapping with the opposite side portions of the band of conductor layer.

3. The semiconductor device according to claim 1, wherein the insulator layer is formed of at least two stacked layers stacked in a vertical direction on each of the two adjacent faces in the vicinity of the boundary line such that the two stacked layers are continuously formed in the vicinity of the boundary line, a layer having the smallest permittivity in the stacked layers cover all over the two adjacent faces, and the thickness of a layer having a smallest permittivity in the stacked layers in the vicinity of the boundary line is larger than that in a region other than the vicinity of the boundary line.

4. The semiconductor device according to claim 3, wherein a layer having the largest permittivity in the stacked layers exists closer to the semiconductor layer than the layer having the smallest permittivity.

5. The semiconductor device according to claim 1, wherein the insulator layer is formed of at least three stacked layers in the vicinity of the boundary line,

two layers having the smallest permittivity among the layers forming the stacked insulator layer hold a layer other than the two layers having the smallest permittivity therebetween, and

a thickness of at least one of the two layers having the smallest permittivity in the vicinity of the boundary line is larger than that in a region other than the vicinity of the boundary line.

6. The semiconductor device according to claim 1, wherein a portion of the boundary line of the semiconductor layer is rounded.

7. The semiconductor device according to claim 1, wherein the insulator layer contains a metal element.

8. The semiconductor device according to claim 7, wherein the metal element is one selected from the group consisting of Hf, Zr, Ti, Sc, Y, Ta, Al, La, Ce, and Pr.

9. The semiconductor device according to claim 8, wherein the insulator layer is either one of a first compound including the metal element and oxygen, or a second compound including the first compound and a silicon oxide.

10. The semiconductor device according to claim 7, wherein the insulator layer further contains nitrogen.

11. A method of manufacturing a semiconductor device, comprising:

preparing a semiconductor substrate on which a first semiconductor layer is formed via a first insulating layer;

selectively etching away the first semiconductor layer to leave a plate of semiconductor region on the first insulating layer;

coating a second insulating layer having a first permittivity on the first insulating layer which includes the plate of semiconductor region formed thereon;

forming a third insulating layer having a second permittivity lower than the first permittivity on an edge portion of the plate-like semiconductor region via the second insulating layer; and

forming a band of electrode so as to cross the plate of semiconductor region via the second insulating layer and the third insulating layer.

12. The method according to claim 11, wherein said forming the third insulating layer having the second permittivity lower than the first permittivity in the edge portion of the plate of semiconductor region comprises:

depositing the third insulating layer having the second permittivity lower than the first permittivity on the second insulating layer so as to bury the plate of semiconductor region;

flatting the upper face of the third insulating layer; and

anisotropically etching the flatted third insulating layer to leave the third insulating layer only in the edge portion of the plate-like semiconductor region.

13. The method according to claim 11, wherein said coating a second insulating layer having a first permittivity on the first insulating layer which includes the plate of semiconductor region formed thereon includes forming a metal silicate film excessively containing Si on the first insulating layer which includes the plate of semiconductor region formed thereon, and

said forming the third insulating layer having the second permittivity lower than the first permittivity on the edge portion of the plate of semiconductor region includes oxidizing the metal silicate film.

14. The method according to claim 11, wherein the second insulating layer contains one element selected from the group consisting of Hf, Zr, Ti, Sc, Y, Ta, Al, La, Ce, and Pr.

15. The method according to claim 14, wherein the second insulating layer contains one selected from the group consisting of an oxide of the metal element, an oxynitride of the element, a compound of the oxide and a silicon oxide or a silicon oxynitride, and a compound of the oxynitride and a silicon oxide or a silicon oxynitride.

16. A method of manufacturing a semiconductor device, comprising:

preparing a semiconductor substrate on which a silicon layer is formed via a first insulating layer;

selectively etching away the silicon layer to leave a plate of silicon region on the first insulating layer;

forming a silicon oxide film in the vicinity of an edge portion of the plate of semiconductor region;

coating the second insulating layer having a permittivity larger than that of a silicon oxide film on the first insulating layer which includes the plate of silicon region formed thereon; and

forming a band of electrode so as to cross the plate of silicon region via the second insulating layer.

17. The method according to claim 16, wherein said forming the silicon oxide film in the vicinity of the edge portion of the plate of semiconductor region includes oxidizing the surface of the plate of semiconductor region.

18. The method according to claim 16, wherein said forming the silicon oxide film in the vicinity of the edge portion of the plate of silicon region includes:

forming a metal silicate film excessively containing oxygen on the first insulating layer which includes the plate of silicon region formed thereon; and

applying a heat treatment to the semiconductor substrate.

19. The method according to claim 16, wherein the second insulating layer contains one element selected from the group consisting of Hf, Zr, Ti, Sc, Y, Ta, Al, La, Ce, and Pr.

20. The method according to claim 19, wherein the second insulating layer contains one selected from the group consisting of an oxide of the metal element, an oxynitride of the element, a compound of the oxide and a silicon oxide or a silicon oxynitride, and a compound of the oxynitride and a silicon oxide or a silicon oxynitride.