Semiconductor circuit device
First Claim
1. A semiconductor circuit device for demodulating digital data from a high-frequency signal having a carrier frequency-modulated based on the digital data, comprising:
- a digital IQ demodulator for performing quadrature demodulation on a digital signal obtained by digital conversion from an analog signal having been obtained by frequency-converting the high-frequency signal while using an oscillation output of a PLL as a reference frequency signal, an F-V converter circuit for converting a frequency of a digital output signal from the digital IQ demodulator to a voltage and outputting a demodulation baseband signal corresponding to the digital data after passing the digital output signal through a band-pass filter, a maximum value holding circuit for holding a maximum value of the demodulation baseband signal outputted from the F-V converter circuit, a minimum value holding circuit for holding a minimum value of the demodulation baseband signal, an averaging circuit for averaging the maximum value of the demodulation baseband signal and the minimum value of the baseband signal, a frequency offset detector for detecting a frequency offset amount on the demodulation baseband signal from the averaging circuit, and an offset correcting unit for correcting the frequency offset amount on the demodulation baseband signal by using the frequency offset amount as a feedback signal to a threshold value for deciding data of the demodulation baseband signal, the frequency offset amount having been detected by the frequency offset detector.
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Accused Products
Abstract
A semiconductor circuit device is provided which can attain more stable operations against noise in a data communication system without increasing the power consumption of an overall system, thereby improving the reliability of data communication. For a demodulation baseband signal (S11) obtained by performing digital processing on an output signal (S6) from an AD converter (6), the maximum value (S12) and the minimum value (S13) are detected as digital values by a maximum value holding circuit (11) and a minimum value holding circuit (12), an averaging circuit (13) obtains an average value (intermediate value) of the maximum value and the minimum value and detects a frequency offset amount (S14), and the frequency offset amount is fed back to a threshold value of data decision (14), so that binarized demodulation data (S15) is outputted in which the offset of the demodulation baseband signal is corrected.
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Citations
11 Claims
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1. A semiconductor circuit device for demodulating digital data from a high-frequency signal having a carrier frequency-modulated based on the digital data, comprising:
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a digital IQ demodulator for performing quadrature demodulation on a digital signal obtained by digital conversion from an analog signal having been obtained by frequency-converting the high-frequency signal while using an oscillation output of a PLL as a reference frequency signal, an F-V converter circuit for converting a frequency of a digital output signal from the digital IQ demodulator to a voltage and outputting a demodulation baseband signal corresponding to the digital data after passing the digital output signal through a band-pass filter, a maximum value holding circuit for holding a maximum value of the demodulation baseband signal outputted from the F-V converter circuit, a minimum value holding circuit for holding a minimum value of the demodulation baseband signal, an averaging circuit for averaging the maximum value of the demodulation baseband signal and the minimum value of the baseband signal, a frequency offset detector for detecting a frequency offset amount on the demodulation baseband signal from the averaging circuit, and an offset correcting unit for correcting the frequency offset amount on the demodulation baseband signal by using the frequency offset amount as a feedback signal to a threshold value for deciding data of the demodulation baseband signal, the frequency offset amount having been detected by the frequency offset detector. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification