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Method for implementation of back-illuminated CMOS or CCD imagers

  • US 20060068586A1
  • Filed: 09/13/2005
  • Published: 03/30/2006
  • Est. Priority Date: 09/17/2004
  • Status: Active Grant
First Claim
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1. A wafer-level process of fabricating an imaging structure, comprising:

  • providing a wafer comprising an oxide layer buried between silicon wafer and device silicon, the oxide layer adapted to form a passivation layer in the imaging structure;

    forming a device layer and interlayer dielectric; and

    removing the silicon wafer to expose the oxide layer.

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