Sharing a physical device among multiple clients

• US 20060069828A1
• Filed: 06/30/2004
• Published: 03/30/2006
• Est. Priority Date: 06/30/2004
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Goldsmith, Michael A.
• Application Number:
  US10/882,458
• Publication Number:
  US 20060069828A1
• Time in Patent Office: Days
• US Class Current: 710/100
• CPC Class Codes: G06F 13/382 using universal interface adapter

Abstract

A physical device has core function circuitry that is to perform a core I/O function of a computer system. Multiple client interface circuits are provided, each of which presents itself as a complete device to a software client in the system, to access the core function circuitry. Multiplexing circuitry couples the client interfaces to the core I/O functionality. Other embodiments are also described and claimed.

Claims

1. A physical device comprising:

core function circuitry that is to perform a core function of a computer system;

a plurality of client interface circuits each of which presents itself as a complete device to a software client in the system to access the core function circuitry; and

multiplexing circuitry that couples the plurality of client interface circuits to the core function circuitry.

2. The device of claim 1 wherein the core function is a primary function of a display graphics adapter.

3. The device of claim 1 wherein the primary function is image rendering.

4. The device of claim 1 wherein the core function is a primary function of a network interface controller.

5. The device of claim 4 wherein the primary function is TCP/IP packet offloading.

6. The device of claim 1 wherein the client interfaces expose different I/O device capabilities to a software client.

7. The device of claim 1 wherein one of the client interfaces exposes a trusted graphics adapter and another one exposes an untrusted graphics adapter.

8. The device of claim 1 wherein each of the plurality of client interfaces has a separate set of registers to configure operation of the core function circuitry,

and wherein one set appears to a software client as an older version of an I/O device and another set appears to the software client as a newer version of said I/O device.

9. The device of claim 1 further comprising:

a control interface circuit that is to be used by service virtual machine (VM) software in the system to control access by a plurality of VMs in the system to the core function circuitry, wherein the plurality of VMs are to access the core function circuitry via the plurality of client interface circuits, respectively.

10. The device of claim 9 wherein the core function is a primary function of a display graphics adapter, and the control interface allows the service VM software to select how to display a plurality of windows for the plurality of VMs, respectively, using the core function circuitry.

11. The device of claim 1 further comprising:

a plurality of world interface circuits that are coupled to the core function circuitry via additional multiplexing circuitry, to translate between signaling in the core function circuitry and signaling external to the device.

12. The device of claim 11 wherein the plurality of world interface circuits are to translate between signaling in the core function circuitry and signaling in a computer peripheral bus.

13. The device of claim 11 wherein the plurality of world interface circuits are to translate between signaling in the core function circuitry and signaling in a LAN node interconnection medium.

14. The device of claim 9 further comprising a plurality of workload queues each coupled between a separate one of the plurality of client interface circuits and the core function circuitry, wherein the control interface circuit allows the service VM to select which queue is to feed the core function circuitry as a function of queue condition.

15. An I/O device comprising:

core I/O function circuitry to perform a core I/O function of a computer system; and

a plurality of client interface circuits any one of which can be used by a virtual machine (VM) in the system to access the core I/O function circuitry to invoke the same core I/O function.

16. The I/O device of claim 15 wherein each of the client interface circuits has a separate set of a registers that are accessible from outside the I/O device, and each set has the same address range except for an offset.

17. The I/O device of claim 15 wherein one of the client interface circuits presents a content protection interface to graphics adapter fucntionality to thwart unauthorized copying of output data that is rendered by the graphics adapter functionality, and another one of the client interface circuits presents an unsecure interface to the graphics adapter functionality.

18. The I/O device of claim 15 wherein the I/O device can give software an ability to change the number of client interfaces at will to better match the resources of the I/O device to the needs of a plurality of virtual machine clients that will access the I/O device through the plurality of client interface circuits, respectively.

19. A computer system with virtual machine capability, comprising:

a processor;

a memory having a virtual machine monitor (VMM) stored therein, wherein the VMM is to be accessed by the processor to manage a plurality of virtual machines (VMs) in the system for running a plurality of client programs, respectively; and

an I/O device having a plurality of interfaces in hardware where each interface presents itself as a separate I/O device to a respective one of the plurality of client programs that will be running within the plurality of VMs.

20. The system of claim 19 wherein the memory further includes a service VM stored therein to be accessed by the processor,

and the I/O device further comprises a control interface in hardware to be used by the service VM to configure the core I/O function circuitry.

21. The system of claim 20 wherein the I/O device further comprises:

a world interface in hardware that is to translate between signaling of the core I/O function circuitry and signaling external to the I/O device.

22. A virtualization apparatus comprising:

means for performing a core I/O function of a computer system;

means for presenting a plurality of complete interfaces to a plurality of virtual machine (VM) clients for accessing the core I/O function, wherein each interface is complete in that it can be accessed as a separate I/O device by the same device driver; and

means for passing messages between the core I/O function performance means and the complete interface presentation means.

23. The virtualization apparatus of claim 22 wherein each of the complete interfaces presents a separate I/O device that has a) a unique device identification number and b) a separate set of configuration registers that are exposed on the same bus.

24. The virtualization apparatus of claim 23 wherein each set of configuration registers is to store a separate PCI device ID, Vendor ID, Revision ID, and Class Code.

25. A method for sharing an I/O device, comprising:

performing a plug and play discovery process in a computer system; and

detecting by said process that a plurality of I/O devices are present in the system, when in actuality the detected I/O devices are due to a single physical I/O device being connected to the system and in which its core I/O functionality is shared by a plurality of hardware client interfaces in the physical I/O device.

26. The method of claim 25 wherein the detecting includes reading a unique PCI device identification number for each of the detected I/O devices from a single graphics adapter card that contains the shared core I/O functionality.

27. The method of claim 25 further comprising:

assigning the plurality of detected I/O devices to a plurality of virtual machines (VMs), respectively, in the system.

28. The method of claim 27 further comprising:

configuring the core I/O functionality to be shared, when servicing the plurality of VMs, according to a priority policy that gives one of the VMs priority over another.

29. An article of manufacture having a machine-readable medium with data stored therein that, when accessed by a processor in a computer system, writes to and reads from a control interface of a physical device in the system to control access to the same core functionality of the device by a plurality of client interfaces in hardware each of which presents itself as a complete device to a device driver program in the system.

30. The article of manufacture of claim 29 wherein the data is part of virtualization software for the system.

31. The article of manufacture of claim 30 wherein the data is such that the writes and reads program the physical device with a scheduling policy for the core functionality to render and display images from the client interfaces in a plurality of display windows, respectively.

32. The article of manufacture of claim 30 wherein the data is such that they program the physical device to select which queue associated with one of the plurality of client interfaces feeds instructions to the core functionality.

33. The article of manufacture of claim 30 wherein the data is such that the writes and reads perform power management operations upon the physical device.

34. The article of manufacture of claim 30 wherein the data is such that the writes and reads are directed to routing an external capture stream to one of the client interfaces.

35. A mutliprocessor computer system with virtual machine capability, comprising:

a plurality of processors;

a memory having a virtual machine monitor (VMM) stored therein, wherein the VMM is to be run by one of the processors to manage a plurality of virtual machines (VMs) in the system for running a plurality of client programs, respectively; and

an I/O device having core functionality and a plurality of interfaces in hardware each of which presents itself as a separate I/O device to a respective one of the plurality of client programs that will be running within the plurality of VMs, wherein the plurality of VMs can simultanously access the core functionality of the I/O device via the plurality of interfaces without being aware of each other and without the VMM having to arbitrate between the plurality of VMs.