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Software state replay

  • US 20060074622A1
  • Filed: 07/12/2005
  • Published: 04/06/2006
  • Est. Priority Date: 07/12/2004
  • Status: Active Grant
First Claim
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1. A method of analyzing a partition of a circuit design, comprising:

  • sampling an emulator to obtain one or more input values provided at a first time to a partition of a circuit design being emulated;

    sampling the emulator to obtain one or more first state values produced by the circuit design partition at the first time;

    using the obtained one or more input values and the one or more first state values to execute a software model that describes the operation of the circuit design partition, so as to calculate one or more second state values produced by the circuit design partition at a second time; and

    registering the one or more second state values in a tangible medium.

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