Overriding processor configuration settings

• US 20060075218A1
• Filed: 10/06/2004
• Published: 04/06/2006
• Est. Priority Date: 10/06/2004
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Barragy, Edward, Newburn, Chris J.
• Granted Patent: US 7,308,571 B2
• Time in Patent Office: Days
• US Class Current: 713/100
• CPC Class Codes: G06F 9/30101 Special purpose registers
• CPC Class Codes: G06F 9/30181 Instruction operation extension or modification

Abstract

In one embodiment, the present invention includes a method for setting an entry in an override register corresponding to a processor feature to override a processor configuration setting for the processor feature and overriding the processor configuration setting for the processor feature using the entry. The entry may be set with a user-level application, for example.

Claims

1. A method comprising:

controlling a feature of a processor via user-level software.

2. The method of claim 1, further comprising disabling the feature via setting an override bit corresponding to the feature in an override register.

3. The method of claim 1, further comprising disabling the feature during a first phase of a program and enabling the feature during a second phase of the program.

4. The method of claim 3, wherein the feature comprises a hardware prefetcher and the second phase comprises garbage collection.

5. The method of claim 1, further comprising dynamically controlling the feature during program execution.

6. A method comprising:

setting an entry in an override register corresponding to a processor feature to override a processor configuration setting for the processor feature; and

overriding the processor configuration setting for the processor feature using the entry in the override register.

7. The method of claim 6, further comprising setting the entry under user control.

8. The method of claim 6, further comprising setting the entry during a first portion of a program and resetting the entry during a second portion of the program.

9. The method of claim 6, further comprising storing entries in the override register upon a context switch.

10. The method of claim 6, further comprising setting the entry based on dynamic profiling of a program.

11. The method of claim 6, further comprising overriding the entry in the override register under hardware control.

12. The method of claim 6, wherein overriding the processor configuration setting comprises performing a logical operation between the entry in the override register and a corresponding entry in a processor configuration register.

13. An apparatus comprising:

a first register to store first override information to override a default setting for at least one processor feature.

14. The apparatus of claim 13, further comprising a processor configuration register to store the default setting for the at least one processor feature.

15. The apparatus of claim 14, further comprising a second register to store second override information used to override the default setting for the at least one processor feature.

16. The apparatus of claim 15, further comprising first logic to couple corresponding entries of the processor configuration register and the first register.

17. The apparatus of claim 16, further comprising second logic to couple an output of the first logic with a corresponding entry of the second register.

18. The apparatus of claim 15, wherein the first register and the second register to store the first override information and the second override information, respectively, under user control.

19. The apparatus of claim 15, wherein the first register to override an enabled state of the at least one processor feature and the second register to override a disabled state of the at least one processor feature.

20. An article comprising a machine-accessible storage medium containing instructions that if executed enable a system to:

set an entry in an override register corresponding to a processor feature to override a processor configuration setting for the processor feature; and

override the processor configuration setting for the processor feature with the entry in the override register.

21. The article of claim 20, further comprising instructions that if executed enable the system to store entries in the override register upon a context switch.

22. The article of claim 20, further comprising instructions that if executed enable the system to set the entry in a first program phase and reset the entry in a second program phase.

23. The article of claim 20, further comprising instructions that if executed enable the system to set the entry based on dynamic profiling of a program.

24. A system comprising:

a processor having a processor configuration register to store a default setting for at least one processor feature, wherein the processor configuration register is architecturally visible; and

a dynamic random access memory coupled to the processor.

25. The system of claim 24, further comprising a first register to store first override information used to override the default setting.

26. The system of claim 25, wherein the dynamic random access memory includes instructions that if executed enable the system to set the first override information during a first portion of a program and reset the first override information during a second portion of the program.

27. The system of claim 25, wherein the dynamic random access memory includes instructions that if executed enable the system to store entries in the first register and the processor configuration register upon a context switch.

28. An apparatus comprising:

an architecturally visible register to store information to enable or disable processor features.

29. The apparatus of claim 28, wherein the architecturally visible register comprises a plurality of bits, each bit associated with a corresponding one of the processor features.

30. The apparatus of claim 28, wherein the architecturally visible register is controllable by user-level software.

31. The apparatus of claim 28, wherein the information is dynamically changed by user-level software.