Graphics processor with snoop filter
First Claim
1. A method of maintaining coherency of data accessed by a remote device, comprising:
- maintaining, on the remote device, a remote cache directory indicative of memory locations residing in a cache on a processor which shares access to some portion of a memory device; and
routing a memory request issued at the remote device to the memory device without sending snoop requests to the processor if information contained in the remote cache directory indicates a valid copy of data targeted by the request does not reside in the processor cache.
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Abstract
Methods and apparatus that may be utilized to maintain coherency of data accessed by both a processor and a remote device are provided. The remote device may include coherency logic, referred to herein as a snoop filter, designed to filter memory access requests that do not require bus commands to be sent to the processor. The snoop filter may filter requests based on a remote cache directory designed to mirror the processor cache directory, such that only those requests that target cache lines indicated to be valid in the processor cache result in snoop commands sent to the processor. Other requests (targeting data that is not cached in the processor) may be routed directly to memory without the latency conventionally associated with snoop requests.
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Citations
21 Claims
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1. A method of maintaining coherency of data accessed by a remote device, comprising:
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maintaining, on the remote device, a remote cache directory indicative of memory locations residing in a cache on a processor which shares access to some portion of a memory device; and
routing a memory request issued at the remote device to the memory device without sending snoop requests to the processor if information contained in the remote cache directory indicates a valid copy of data targeted by the request does not reside in the processor cache. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. A device configured to access data stored in memory and cacheable by a processor, comprising:
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at least one processing core;
a remote cache directory indicative of contents of a processor cache residing on the processor; and
a snoop filter configured to route a memory request issued by the processing core to a memory device without sending snoop requests to the processor if information contained in the remote cache directory indicates a valid copy of data targeted by the memory request does not reside in the processor cache. - View Dependent Claims (12, 13, 14, 15, 16, 17)
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18. A coherent system, comprising:
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a processor comprising a cache for storing data accessed from an external memory device and a cache directory with entries indicating which memory locations are stored in cache lines of the cache and corresponding coherency states thereof; and
a remote device comprising a remote cache directory indicative of contents of the cache residing on the processor and a snoop filter configured to route a memory request issued at the remote device to the memory device without sending snoop requests to the processor if information contained in the remote cache directory indicates a valid copy of data targeted by the memory request does not reside in the processor cache. - View Dependent Claims (19, 20, 21)
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Specification