Acquisition of extended display identification data (EDID) using inter-IC (I2C) protocol
First Claim
1. In a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an I2C data bus each coupled to a host device, a method of transferring EDID from the memory device over the I2C data bus to a request one of the data ports while servicing a processor memory access request without clock stretching, comprising:
- generating an EDID read request by the host device;
passing the EDID read request by way of the requesting port to the memory device;
transferring the requested EDID from the memory device to a data buffer, granting memory access to the processor;
reading the requested EDID from the buffer in a byte by byte manner; and
sending each byte of data through the requesting data port bit by bit to the host device wherein the requesting data port is provided access to the memory device as needed without clock stretching thereby maintaining compliance to the VESA standard.
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Accused Products
Abstract
In a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an 12C data bus each coupled to a host device, a method of transferring EDID from the memory device over the 12C data bus to a requesting one of the data ports while servicing a processor memory access request without clock stretching.
54 Citations
14 Claims
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1. In a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an I2C data bus each coupled to a host device, a method of transferring EDID from the memory device over the I2C data bus to a request one of the data ports while servicing a processor memory access request without clock stretching, comprising:
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generating an EDID read request by the host device;
passing the EDID read request by way of the requesting port to the memory device;
transferring the requested EDID from the memory device to a data buffer, granting memory access to the processor;
reading the requested EDID from the buffer in a byte by byte manner; and
sending each byte of data through the requesting data port bit by bit to the host device wherein the requesting data port is provided access to the memory device as needed without clock stretching thereby maintaining compliance to the VESA standard. - View Dependent Claims (3, 4, 5, 6)
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2. Computer program product of transferring EDID from the memory device over the I2C data bus to a requesting one of the data ports while servicing a processor memory access request without clock stretching, in a VESA standard compliant display controller having a processor arranged to process executable instructions and associated data, a memory device arranged to store EDID and the executable instructions and associated data, a number of data ports coupled to the memory device by way of an I2C data bus each coupled to a host device, a, comprising:
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computer code for generating an EDID read request by the host device;
computer code for passing the EDID read request by way of the requesting port to the memory device;
computer code for transferring the requested EDID from the memory device to a data buffer;
computer code for granting memory access to the processor, computer code for reading the requested EDID from the buffer in a byte by byte manner;
computer code for sending each byte of data through the requesting data port bit by bit to the host device wherein the requesting data port is provided access to tee memory device as needed without clock stretching thereby maintaining compliance to the VESA standard; and
computer readable medium for storing the computer code. - View Dependent Claims (7, 8, 9, 10)
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11. An EDID compatible display controller coupled to a VESA compliant display having a number of bi-directional data ports coupled to a host device, comprising:
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a processor arranged to process executable instructions and associated data and generate a processor memory access request in accordance thereof;
a memory device ranged to store EDID and the executable instructions and associated data;
an I2C data bus coupling each of the data ports to the memory device; and
a data buffer coupled to the memory device and the I2C bus, wherein in order to transfer EDID from the memory device over the I2C data bus to a requesting one of the data ports based upon an EDID read request generated by the host device while concurrently servicing the processor memory access request without clock stretching, the requested EDID is passed from the memory device to the data buffer after which the processor only is granted memory access and the requested EDID is passed from tie buffer to the requesting one of the data ports in a byte by byte manner thereby providing an I2C data transfer in the VESA compliant display. - View Dependent Claims (12, 13, 14)
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Specification