Method for making electronic packages

• US 20060084254A1
• Filed: 11/21/2005
• Published: 04/20/2006
• Est. Priority Date: 01/06/2004
• Status: Active Grant

• Current Assignee: ISMAT Corporation
• Original Assignee: ISMAT Corporation
• Inventors: Attarwala, Abbas Ismail
• Granted Patent: US 7,575,955 B2
• Time in Patent Office: Days
• US Class Current: 438/584
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 2224/05552 in top view
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/13111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/29111 Tin [Sn] as principal constituent
• CPC Class Codes: H01L 2224/2929 with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2224/29339 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/32225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/49109 outside the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/73204 the bump connector being embedded into the layer connector
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/75 Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 2224/75251 : in the lower part of the bonding apparatus, e.g. in the apparatus chuck
• CPC Class Codes: H01L 2224/81 : using a bump connector
• CPC Class Codes: H01L 2224/81222 : Induction heating, i.e. eddy currents
• CPC Class Codes: H01L 2224/81234 : using means for applying energy being within the device, e.g. integrated heater
• CPC Class Codes: H01L 2224/81805 : involving forming a eutectic alloy at the bonding interface
• CPC Class Codes: H01L 2224/83 : using a layer connector
• CPC Class Codes: H01L 2224/85 : using a wire connector
• CPC Class Codes: H01L 2224/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/36 : Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks H01L23/28, H01L23/40, H01L23/42, H01L23/44, H01L23/46 take precedence; heating H01L23/345
• CPC Class Codes: H01L 23/3675 : characterised by the shape of the housing
• CPC Class Codes: H01L 23/49816 : Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/49822 : Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/552 : Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/31 : Structure, shape, material or disposition of the layer connectors after the connecting process
• CPC Class Codes: H01L 24/45 : of an individual wire connector
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/49 : of a plurality of wire connectors
• CPC Class Codes: H01L 24/73 : Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/75 : Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 24/81 : using a bump connector
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00011 : Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 : Silicon [Si]
• CPC Class Codes: H01L 2924/01027 : Cobalt [Co]
• CPC Class Codes: H01L 2924/01028 : Nickel [Ni]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/0105 : Tin [Sn]
• CPC Class Codes: H01L 2924/01076 : Osmium [Os]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/0132 : Binary Alloys
• CPC Class Codes: H01L 2924/01322 : Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
• CPC Class Codes: H01L 2924/01327 : Intermediate phases, i.e. intermetallics compounds
• CPC Class Codes: H01L 2924/0133 : Ternary Alloys
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/0665 : Epoxy resin
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/1532 : the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/15321 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/15724 : Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2924/15747 : Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2924/15787 : Ceramics, e.g. crystalline carbides, nitrides or oxides
• CPC Class Codes: H01L 2924/1579 : with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
• CPC Class Codes: H01L 2924/16195 : Flat cap [not enclosing an internal cavity]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H01L 2924/3512 : Cracking

Abstract

A process for fabricating an electronic package for a Thermally Enhanced BGA package including the steps of fabricating a thermally conductive support member, an adhesive bonding member, and a circuitized member; sandwiching the members together, forming a cavity therein; bonding adhesively the members together with heat and pressure; bonding adhesively a chip to the support member within the cavity; and connecting electrically the chip to the circuitized member. A process for fabricating an electronic flip chip package, including the steps of fabricating an adhesive bonding member, a flip chip, and a circuitized member; aligning the members with respect to each other; sandwiching the members together; bonding the members together with heat and pressure; and connecting electrically the flip chip to the circuitized member.

Claims

3. A process for fabricating an electronic package substrate, comprising:

fabricating a thermally conductive support member;

fabricating an adhesive bonding member from a sheet of adhesive;

fabricating a circuitized member;

sandwiching the members together; and

bonding adhesively the members together with heat and pressure.

4. A process for fabricating an electronic package substrate, comprising:

fabricating an electrically conductive support member;

fabricating an electrically conductive adhesive bonding member from a sheet of electrically conductive adhesive;

fabricating a circuitized member;

sandwiching the members together; and

bonding adhesively the members together with heat and pressure, whereby the electrically conductive adhesive bonding member is electrically connected to a ground pad on the circuitized member and to the electrically conductive support member.

5. A process for fabricating an electronic package, comprising:

fabricating a thermally conductive support member;

fabricating an adhesive bonding member from a sheet of adhesive;

fabricating a circuitized member;

sandwiching the members together, forming a cavity therein;

bonding adhesively the members together with heat and pressure;

bonding adhesively a chip to the support member within the cavity; and

connecting electrically the chip to the circuitized member.

6. A process for fabricating an electromagnetically shieldable electronic package, comprising:

fabricating an electrically conductive support member;

fabricating an electrically conductive adhesive bonding member from a sheet of electrically conductive adhesive;

fabricating a circuitized member;

sandwiching the members together, forming a cavity therein;

bonding adhesively the members together with heat and pressure, whereby the electrically conductive adhesive bonding member is electrically connected to a ground pad on the circuitized member and to the electrically conductive support member;

bonding adhesively a chip to the support member within the cavity; and

connecting electrically the chip to the circuitized member.

7. A process for fabricating an electronic flip chip package, comprising:

fabricating an adhesive bonding member from a sheet of adhesive;

fabricating a flip chip;

fabricating a circuitized member;

aligning the members with respect to each other;

sandwiching the members together;

bonding the members together with heat and pressure; and

connecting mechanically and electrically the flip chip to the circuitized member.

1. A process for fabricating an electronic package substrate, comprising:

fabricating an adhesive bonding member from a sheet of adhesive;

fabricating a circuitized member;

aligning the members with respect to each other;

sandwiching the members together; and

bonding the members together with heat and pressure.

2. The process of claim 1 including forming simultaneously a plurality of substrates in an array surrounded by a frame formed by the sheet of adhesive from which the bonding members are fabricated.

8. The process of claim 7 wherein connecting electrically includes melting and bonding an array of solder bumps on the flip chip to the circuitized member.

9. The process of claim 8 wherein the melting of the solder bumps is melting by magnetic induction.

10. The process of claim 9 further including thereafter melting and bonding an array of solder balls to the circuitized member at a temperature of at least about 20°

C. lower than the temperature at which the bumps were melted.

10-1. The process of claim 9 wherein the melting of the solder balls is melting by magnetic induction.

11. A process for fabricating a thermally enhanced electronic flip chip package, comprising:

fabricating a first adhesive bonding member from a sheet of adhesive;

fabricating a flip chip;

fabricating a circuitized member;

aligning the members with respect to each other;

sandwiching the members together;

bonding the members together with heat and pressure;

connecting mechanically and electrically the flip chip to the circuitized member, thereby forming a flip chip electronic package;

fabricating a second adhesive bonding member from a sheet of adhesive;

fabricating a heat sink;

aligning the flip chip electronic package, the second adhesive bonding member, and the heat sink with respect to each other;

sandwiching the flip chip electronic package, the second adhesive bonding member, and the heat sink together; and

bonding the flip chip electronic package, the second adhesive bonding member, and the heat sink together with heat and pressure.

12. A process for fabricating an electrically shieldable electronic flip chip package, comprising:

fabricating a first electrically conductive adhesive bonding member from a sheet of electrically conductive adhesive;

fabricating a circuitized member;

aligning the members with respect to each other;

sandwiching the members together;

bonding the members together with heat and pressure, whereby the first electrically conductive adhesive bonding member is electrically connected to a ground pad on the circuitized member;

fabricating a flip chip;

connecting mechanically and electrically the flip chip to the circuitized member, thereby forming a flip chip electronic package;

fabricating a second electrically conductive adhesive bonding member from a sheet of electrically conductive adhesive;

fabricating an electrically conductive heat sink;

aligning the flip chip electronic package, the second adhesive bonding member, and the heat sink with respect to each other;

sandwiching the flip chip electronic package, the second adhesive bonding member, and the heat sink together; and

bonding the flip chip electronic package, the second adhesive bonding member, and the heat sink together with heat and pressure, whereby the first electrically conductive adhesive bonding member is electrically connected to the electrically conductive second bonding member, and the second bonding member is electrically connected to the electrically conductive heat sink, thereby forming an electrically groundable shield around the flip chip.