System and method for connecting electrical devices using fiber optic serial communication

• US 20060086893A1
• Filed: 01/24/2005
• Published: 04/27/2006
• Est. Priority Date: 10/27/2004
• Status: Active Grant

• Current Assignee: Electro Industries/Gaugetech
• Original Assignee: Electro Industries/Gaugetech
• Inventors: Banhegyesi, Tibor, Spanier, Joseph
• Granted Patent: US 7,388,189 B2
• Time in Patent Office: Days
• US Class Current: 250/214.R
• CPC Class Codes: H04B 10/2755 Ring-type networks with a headend

Abstract

A system and method for communicating between serially connected electrical devices of a network is provided. The network includes a series of electrical devices, and fiber optic connectors between electrical devices of the series of electrical devices forming a closed communication ring in which output of each electrical device is communicatively connected to input of a subsequent electrical device of the series of electrical devices.

Claims

1. An electrical device comprising:

an input channel for receiving a light signal;

light to voltage converter (LVC) circuitry for receiving the light signal from the input channel and converting the light signal to a voltage signal;

a processor for receiving the voltage signal, processing the voltage signal and outputting results of the processing;

voltage to light converter (VLC) circuitry for receiving the converted voltage signal and the output results from the processor and converting the received signal to a light signal; and

an output channel for outputting the light signal from the VLC circuitry.

2. The device according to claim 1, wherein the received light signal and the output light signal are propagated along fiber-optic connectors.

3. The device according to claim 1, wherein:

the received light signal has an associated address; and

the processor processes content of a non-address portion of the received voltage signal depending on if the associated address included in the signal correlates to an address assigned to the device.

4. The device according to claim 3, wherein the processor comprises a delay module for generating a delay for a predetermined time period in association with processing the non-address portion of the received voltage signal.

5. The device according to claim 4, wherein the time period is adjustable.

6. The device according to claim 5, wherein:

the electrical device is included in a network having a series of electrical devices; and

adjustment of the time period is in accordance with a function of at least one of a distance a received light signal is propagated from the origin of the message within the series of electrical devices to the electrical device, the number of electrical devices included in the series of electrical devices, and the distance a light signal transmitted by the electrical device is propagated from the electrical device to a final destination within the series of electrical devices.

7. The device according to claim 1, wherein:

the processor includes input/output (I/O) circuitry; and

the input channel, the output channel, the LVC circuitry, the VLC circuitry and associated circuitry are packaged for installation with the processor for communicating with the processor via the I/O circuitry of the processor.

8. The device according to claim 7, wherein the packaging is in the form of an IC chip.

9. The device according to claim 1, wherein the electrical device is included in a network having a series of electrical devices, including a plurality of slave devices and a master device.

10. The device according to claim 1, further comprising gate circuitry having a first input for receiving the voltage signal from the LVC circuitry, a second input for receiving output results from the processor, and circuitry for generating an output signal which is provided to the VLC circuitry, wherein the output signal corresponds to a signal received at one of the first and second inputs.

11. Circuitry for connecting an electrical device to a network of connected electrical devices, the circuitry comprising:

an input channel for receiving a light signal from an output channel of a preceding electrical device of the series of electrical devices;

light to voltage converter (LVC) circuitry for receiving the light signal from the input channel and converting the light signal to a voltage signal and providing the voltage signal to a processor of the electrical device;

voltage to light converter (VLC) circuitry for receiving the converted voltage signal and the output results from the processor and converting the received signal to a light signal; and

an output channel outputting the light signal from the VLC circuitry to a subsequent electrical device of the series of electrical devices.

12. The circuitry according to claim 11, wherein the circuitry is packaged as an IC chip.

13. The circuitry according to claim 11, wherein the electrical device is configured for propagating electrical signals along a conductive path between the electrical device and another electrical device of the series of electrical devices, and installation of the circuitry with the electrical device allows for propagation of light signals along fiber optic connectors between the electrical device and the other electrical device.

14. The circuitry according to claim 11, wherein at least one of sensitivity of the LVC circuitry for sensing the received light signal and amplification by the VLC circuitry of the output light signal is adjustable.

15. The circuitry according to claim 11, further comprising gate circuitry having a first input for receiving the voltage signal from the LVC circuitry, a second input for receiving output results from the processor, and circuitry for performing a logical OR operation on signals received at the first and second inputs and generating an output signal which is provided to the VLC circuitry.

16. A network of serially connected electrical devices comprising:

a series of electrical devices; and

fiber optic connectors between electrical devices of the series of electrical devices for forming a closed communication ring in which an output of respective electrical devices is communicatively connected to an input of a subsequent electrical device of the series of electrical devices.

17. The network according to claim 16, wherein the series of electrical devices includes a plurality of slave devices and a master device.

18. The network according to claim 16, wherein the network operates using a serial protocol which is half duplex.

19. The network according to claim 17, wherein:

a protocol used by the network is addressable;

respective signals generated by the master device are associated with an address assigned to an individual slave device of the plurality of slave devices; and

respective slave devices comprise a processor for processing non-address content of the signal depending on if the address associated with the signal correlates to the address assigned to the respective slave device.

20. The network according to claim 16, wherein respective electrical devices of the series of electrical devices comprise:

an input channel for receiving a light signal from an output channel of a preceding electrical device of the series of electrical devices;

light to voltage converter (LVC) circuitry for receiving the light signal from the input channel and converting the light signal to a voltage signal;

a processor for receiving the voltage signal, processing the voltage signal and outputting results of the processing;

voltage to light converter (VLC) circuitry for receiving the converted voltage signal and the output results from the processor and converting the received signal to a light signal; and

an output channel for outputting the light signal from the VLC circuitry to a subsequent electrical device of the series of electrical devices.

21. The network according to claim 20, wherein the processor comprises a delay module for generating a delay for a predetermined time period in association with processing the non-address portion of the received voltage signal.

22. The network according to claim 21, wherein the time period is adjustable.

23. The network according to claim 21, wherein:

processing the non-address content of the signal includes generating and outputting a reply signal; and

the time period for different slave devices of the plurality of slave devices is different for staggering the reply signals from different slave devices.

24. The network according to claim 16, wherein the network comprises a first and second series of electrical devices, and fiber optic connectors between electrical devices of each of the first and second series for forming first and second communication rings in which an output of respective electrical devices is communicatively connected to an input of a subsequent electrical device of the corresponding series of first and second series.

25. The network according to claim 24, wherein the communication ring to be used for communication within the network is selectable.

26. An electrical device of a plurality of serially connected electrical devices, wherein the plurality of serially connected electrical devices form a closed communication ring in which an output of a respective electrical device of the plurality of serially connected electrical devices is communicatively connected to an input of a subsequent electrical device of the plurality of serially connected electrical devices, the electrical device comprising:

a processor for receiving, processing and outputting signals;

circuitry for receiving light signals from a preceding electrical device of the plurality of serially connected electrical devices, converting the received light signals into electrical signals and providing the electrical signals to the processor; and

circuitry for receiving electrical signals output from the processor, converting received electrical signals into light signals and providing the light signals to the subsequent electrical device of the plurality of serially connected electrical devices;

wherein the light signals are propagated between electrical devices of the plurality of serially connected electrical devices primarily via fiber optic connectors.

27. The device according to claim 26, wherein the plurality of serially connected devices includes a master device and a plurality of slave devices, and wherein the device is a master device.

28. The device according to claim 27, wherein the processor of the master device is configured for generating a master message to be sent in an outgoing signal that is addressed for at least one slave device of the plurality of slave devices.

29. The device according to claim 28, wherein the processor of the master device is configured for waiting for response to a master message before sending a subsequent master message.

30. The device according to claim 26, wherein the plurality of serially connected devices includes a master device and a plurality of slave devices, and wherein the device is a slave device.

31. The device according to claim 30, wherein the circuitry for receiving comprises gate circuitry having a first input for receiving the converted electrical signals directly from the circuitry for receiving light signals, a second input for receiving electrical signals output by the processor, and circuitry for generating an output signal which is provided to the VLC circuitry, wherein the output signal corresponds to a signal received at one of the first and second inputs.

32. The device according to claim 30, wherein:

the protocol is addressable;

respective signals generated by the master device are associated with an address assigned to an individual slave device of the plurality of slave devices; and

the processor processes non-address content of the signal depending on if the address associated with the signal correlates to the address assigned to the slave device.

33. The device according to claim 32, wherein the processor comprises a delay module for generating a delay for a predetermined time period in association with processing the non-address portion of the received electrical signal.

34. The device according to claim 26, wherein the plurality of serially connected devices includes a master device and a plurality of slave devices, and wherein the device selectably operates in a first mode as the master device or in a second mode as a slave device of the plurality of slave devices.

35. A method of communicating light signals between an electrical device and other electrical devices of a series of electrical devices comprising the steps of:

communicating with at least one electrical device of the series of electrical devices configured in a closed communication ring in which an output channel of respective electrical devices of the series of electrical devices is communicatively connected by a fiber optic connector to an input channel of a subsequent electrical device of the series of electrical devices;

receiving a light signal in an electrical device of the series of electrical devices from a preceding electrical device of the series of electrical devices; and

processing the received light signal using digital processing circuitry.

36. The method according to claim 35, further comprising the steps of:

converting the received light signal to an electrical signal, wherein the processing step comprises processing the converted electrical signal;

converting at least a signal including results of the processing into a light signal; and

transmitting the converted light signal to a subsequent electrical device of the series of electrical devices.

37. The method according to claim 35, wherein the processing step is performed depending on if an address associated with the received light signal correlates to an address assigned to the electrical device, and further comprises the step of waiting for a predetermined time period.

38. The method according to claim 37, further comprising the step of adjusting the predetermined time period.

39. The method according to claim 36, further comprising the step of performing a logic OR operation on the converted electrical signal and the processed converted electrical signal;

and the converting into a light signal step is performed on the results of the logic OR operation.