Clock modulation systems
First Claim
1. A clock modulation system comprising:
- a clock modulator generating Bit Rate Agile (BRA) clock shaped, clock modulated signals;
a modulator filter band limiting the said modulated signals;
a signal transmitter transmitting the clock modulated bandlimited signals;
a receiver and demodulator for reception and demodulation of clock modulated signals; and
a Bit Rate Agile (BRA) demodulator filter for filtering the received signals said demodulator filter having intentionally miss-matched filter parameters to that of the modulator filter.
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Abstract
Clock Modulation (CM), Shaped Clocked (SC) systems, Modulation and Demodulation (Modem), Baseband Processing (BBP), Intermediate Frequency (IF) and Radio Frequency (RF) signal generation-reception and processing CM methods and implementations are presented. Systems having a data unit for receiving and providing a data signal to one or two clock generators generating a first shaped clock signal and providing the first shaped clock signal to a selector switch and a second clock generator generating a second shaped clock signal and providing the second shaped clock signal to the selector switch and a selector switch for selecting the first or the second shaped clock signal and connecting the selected shaped clock signal to a signal transmitter is disclosed. The selectable clock signal parameters include symmetrical and non-symmetrical clock signals, shaped band-limited continuous clock signal patterns, shaped encoded clock signals, variable rise and fall time clock signals, clock signals having adjustable on and off duration, multilevel and shaped clock signals and asynchronous clock signal information transmission means, where asynchronous clocking is referenced to the incoming data source signals. The Clock Modulation (CM), Shaped Clocked (SC) systems, also designated as Feher Keying (FK) systems or FK processors are also used in conjunction with cross-correlated quadrature and also non quadrature modem systems as input drive signals to FM VCO based systems, to SSB to VSB to DSB-SC to QAM, and/or to coded systems. The FK systems comprises entire transceiver structures including LIN (linear) and NLA (Non Linear Amplifier) transmitter receiver, AGC, synchronization and demodulation and post demodulation signal processors.
51 Citations
14 Claims
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1. A clock modulation system comprising:
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a clock modulator generating Bit Rate Agile (BRA) clock shaped, clock modulated signals;
a modulator filter band limiting the said modulated signals;
a signal transmitter transmitting the clock modulated bandlimited signals;
a receiver and demodulator for reception and demodulation of clock modulated signals; and
a Bit Rate Agile (BRA) demodulator filter for filtering the received signals said demodulator filter having intentionally miss-matched filter parameters to that of the modulator filter. - View Dependent Claims (4, 5, 6, 7, 8)
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2. A system comprising:
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a unit for providing a Bit Rate Agile (BRA) data signal to a clock modulator;
a clock modulator generating a first shaped and a second shaped BRA clock modulated signal and providing said modulated signals to a selector switch;
a selector switch for selecting the first or the second modulated signal and connecting the selected signal modulated to a signal transmitter filter;
a transmitter filter band limiting the said modulated signals;
a signal transmitter transmitting the clock modulated bandlimited signals;
a receiver and demodulator for reception and demodulation of clock modulated signals; and
a Bit Rate Agile (BRA) demodulator filter for filtering the received signals. - View Dependent Claims (9, 10, 11)
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3. A system comprising:
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a data unit for providing a data signal to two clock generators;
a first clock generator generating a first shaped, non-symmetrical format clock signal and providing the first shaped clock signal to a selector switch;
a second clock generator generating a second shaped clock signal and providing the second shaped clock signal to the said selector switch;
a selector switch for selecting the first or the second shaped clock signal, said selector switch having a first input interface port coupled to data controller signals, and a set of input ports coupled to the shaped clock signals and an output interface port coupled to said selector switch output. - View Dependent Claims (12, 13, 14)
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Specification