Semiconductor device and method of producing a semiconductor device
First Claim
1. A semiconductor device comprising:
- a transistor body having a top surface and having a first doping area and a second doping area, and a channel region between the first doping area and the second doping area;
a gate dielectric located over the top surface of the transistor body;
a gate electrode disposed above the channel region and disposed on the gate dielectric such that the gate dielectric is located between the gate electrode and the top surface of the transistor body; and
an oxide-nitride-oxide layer having first portions, each having a bottom surface and second portions, each having a bottom surface;
wherein the first portions of the oxide-nitride-oxide layer are disposed above the first and second doping areas and the bottom surfaces of the first portions of the oxide-nitride-oxide layer are substantially parallel to the top surface of the transistor body; and
wherein the bottom surfaces of the second portions of the oxide-nitride-oxide layer are located adjacent to the gate electrode and extend in a direction not substantially parallel to the top surface of the transistor body.
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Accused Products
Abstract
Semiconductor Device And Method Of Producing A Semiconductor Device A semiconductor device comprises a memory cell (160) including a transistor body (150) having a top surface (111) and including a first doping area (10a) and a second doping area (10b) with a channel region (110) in between. The memory cell (160) further includes a gate electrode (3a) arranged above the channel region (110) and separated therefrom by a dielectric layer (2a). An oxide-nitride-oxide layer (66) has first portions (661) and second portions (662). The first portions (661) of the oxide-nitride-oxide layer (66) are arranged above at least parts of the first and second doping areas (10a, 10b) and are substantially parallel to the top surface (111) of the transistor body (150). The second portions (662) of the oxide-nitride-oxide layer (66) are adjacent to the gate electrode (3a) and extend in a direction not substantially parallel to the top surface (111) of the transistor body (150).
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Citations
47 Claims
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1. A semiconductor device comprising:
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a transistor body having a top surface and having a first doping area and a second doping area, and a channel region between the first doping area and the second doping area;
a gate dielectric located over the top surface of the transistor body;
a gate electrode disposed above the channel region and disposed on the gate dielectric such that the gate dielectric is located between the gate electrode and the top surface of the transistor body; and
an oxide-nitride-oxide layer having first portions, each having a bottom surface and second portions, each having a bottom surface;
wherein the first portions of the oxide-nitride-oxide layer are disposed above the first and second doping areas and the bottom surfaces of the first portions of the oxide-nitride-oxide layer are substantially parallel to the top surface of the transistor body; and
wherein the bottom surfaces of the second portions of the oxide-nitride-oxide layer are located adjacent to the gate electrode and extend in a direction not substantially parallel to the top surface of the transistor body. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A semiconductor device, comprising:
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a substrate having a top surface;
a multitude of gate electrodes disposed on the top surface of the substrate, the gate electrodes disposed in an array having rows located parallel to a first direction and columns located parallel to a second direction, which is orthogonal with respect to the first direction;
a multitude of gate dielectrics, one of the multitude of the gate dielectrics disposed between one of the multitude of gate electrodes and the top surface of the substrate;
at least two bitlines disposed along the second direction on either side of a column of the gate electrodes, the bitlines buried beneath the top surface of the substrate;
a channel region disposed in the substrate between the bitlines and beneath one of the gate electrodes; and
an oxide-nitride-oxide layer having first portions each having a bottom surface, and second portions each having a bottom surface;
wherein the first portions of the oxide-nitride-oxide layer are disposed above the first and second doping areas, and the bottom surfaces of the first portions of the oxide-nitride-oxide layer are substantially parallel to the top surface of the substrate; and
wherein the bottom surfaces of the second portions of the oxide-nitride-oxide layer are located adjacent to the gate electrode and extend in a direction not substantially parallel to the top surface of the substrate. - View Dependent Claims (22, 23, 24, 25, 26, 27, 28, 29, 30, 31)
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32. A method of producing a semiconductor device, the method comprising:
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providing a semiconductor substrate having a top surface;
depositing an oxide layer on the substrate;
introducing dopants into the substrate to form a well;
depositing a conductive layer onto the oxide layer;
partially etching the conductive layer and the oxide layer to form a gate island thereby exposing the top surface of the semiconductor substrate; and
depositing an oxide-nitride-oxide layer onto the exposed top surface of the semiconductor substrate and the top surface and sidewalls of the gate island. - View Dependent Claims (33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47)
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Specification