TRENCH PHOTODETECTOR

• US 20060091489A1
• Filed: 11/01/2004
• Published: 05/04/2006
• Est. Priority Date: 11/01/2004
• Status: Active Grant

• Current Assignee: Google LLC (Alphabet Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Divakaruni, Ramachandra, Cheng, Kangguo, Radens, Carl J.
• Granted Patent: US 7,264,982 B2
• Time in Patent Office: Days
• US Class Current: 257/458
• CPC Class Codes: H01L 31/03529 Shape of the potential jump barrier or surface barrier
• CPC Class Codes: H01L 31/105 the potential barrier being of the PIN type
• CPC Class Codes: H01L 31/1804 comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: Y02E 10/547 Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

Trench type PIN photodetectors are formed by etching two sets of trenches simultaneously in a semiconductor substrate, the wide trenches having a width more than twice as great as the narrow trenches by a process margin; conformally filling both types of trenches with a sacrificial material doped with a first dopant and having a first thickness slightly greater than one half the width of the narrow trenches, so that the wide trenches have a remaining central aperture; stripping the sacrificial material from the wide trenches in an etch that removes a first thickness, thereby emptying the wide trenches; a) filling the wide trenches with a second sacrificial material of opposite polarity; or b) doping the wide trenches from the ambient such as by gas phase doping, plasma doping, ion implantation, liquid phase doping, infusion doping and plasma immersion ion implantation; diffusing the dopants into the substrate, forming p and n regions of the PIN diode; removing the first and the second sacrificial materials, and filling both the wide and the narrow sets of trenches with the same conductive material in contact with the diffused p and n regions.

Claims

1. A method of forming a PIN photodetector having a set of p and n regions separated by a set of photon detector regions in a solid state wafer comprising the steps of:

Simultaneously forming two sets of deep trenches, separated by a set of photon detection regions, in said solid state wafer, one wide set of trenches being wider than the other narrow set, such that the wide set has a remaining central aperture when the narrower set is filled with a conformally deposited material;

Filling the narrow trenches and conformally partially filling the wide trenches with a first material doped with a first type of dopant;

Removing the first material from the wide trenches;

Depositing a second material doped with a second (opposite) type of dopant of opposite polarity in the wide trenches;

Annealing the wafer to drive the first and second types of dopants into the substrate to form the p and n regions of the PIN photodetector;

Removing the first and second materials from both the wide and narrow trenches; and

Filling both the wide and narrow trenches with the same forming conductive material connected to said p and n regions in both the wide and narrow trenches.

2. A method according to claim 1, in which the first and second materials are both silicon oxide.

3. A method according to claim 2, in which the conductive material electrodes are formed from at least one metal or metal silicide.

4. A method according to claim 3, in which the conductive electrodes are formed from at least one metal or metal silicide selected from the group consisting of:

W, Ti, Ta, TiN, WN, TaN, WSi, TiSi, CoSi, NiSi.

5. A method according to claim 1, in which the step of filling the narrow trenches and partially filling the wide trenches with a first material doped with a first type of dopant is performed by depositing a conformal layer of said first material, so such that the narrow trenches are filled and the wide trenches have a layer of the first material on the sides thereof and a remaining central aperture.

6. A method according to claim 5, in which the first material is deposited in a layer having a thickness of the first material that is greater than one half the width of the narrow trenches and less than one half the width of the wide trenches, thereby filling the narrow trenches and producing the remaining central aperture in the wide trenches.

7. A method according to claim 1, in which the first material is removed in an isotropic etch having an etching target greater than the thickness of the first material by a process margin.

8. A method according to claim 1, further comprising a step of depositing a cap layer over said two sets of deep trenches before said step of annealing.

9. A method of forming a PIN photodetector having a set of p and n regions separated by a set of photon detector regions in a solid state wafer comprising the steps of:

Simultaneously forming two sets of trenches, separated by a set of photon detection regions, in said solid state wafer, one wide set of trenches being wider than the other narrow set, such that the wide set has a remaining central aperture when the narrower set is filled with a conformally deposited material;

Filling the narrow trenches and conformally partially filling the wide trenches with a first material doped with a first type of dopant;

Removing the first material from the wide trenches;

Doping the wide trenches from the ambient with a second type of dopant of opposite polarity;

Annealing the wafer to drive the first and second types of dopants into the substrate to form the p and n regions of the PIN photodetector;

Removing the first material from the narrow trenches; and

Forming conductive material connected to said p and n regions in both the wide and narrow trenches.

10. A method according to claim 9, in which said step of doping the wide trenches and annealing the wafer to drive the first and second types of dopants into the substrate are performed simultaneously.

11. A method according to claim 9, in which said step of doping the wide trenches from the ambient includes a step from the group comprising:

gas phase doping, plasma doping, ion implantation, liquid phase doping, infusion doping and plasma immersion ion implantation.

12. A method according to claim 11, in which the first material is doped silicon oxide.

13. A method according to claim 11, in which the conductive material includes at least one metal or metal silicide.

14. A PIN photodetector having a set of p regions and a set of n regions separated by a set of photon detector regions in a solid state wafer comprising:

two sets of trenches, separated by a set of photon detection regions, in said solid state wafer, one wide set of trenches being wider than the other narrow set, such that;

the wide set has a remaining central aperture when the narrow set is filled with a conformally deposited material;

the p and n regions of the PIN photodetector are formed in the substrate adjacent to the two sets of deep trenches; and

both the wide and the narrow sets of trenches are filled with the same conductive electrodes connected to said p and n regions.

15. A photodetector according to claim 14, in which the width of said wide trenches is more than twice as great as the width of said narrow trenches.

16. A photodetector according to claim 14, in which the conductive material electrodes are formed from at least one metal or metal silicide.

17. A photodetector according to claim 16, in which the conductive electrodes are formed from at least one metal or metal silicide selected from the group consisting of:

W, Ti, Ta, TiN, WN, TaN, WSi, TiSi, CoSi, NiSi.

18. A photodetector according to claim 14, in which the solid state wafer is a silicon-on-insulator wafer.

19. A photodetector according to claim 18, in which the width of said wide trenches is more than twice as great as the width of said narrow trenches.

20. A photodetector according to claim 19, in which the conductive electrodes are formed from at least one metal or metal silicide selected from the group consisting of:

W, Ti, Ta, TiN, WN, TaN, WSi, TiSi, CoSi, NiSi.