Unknown

• US 20060091898A1
• Filed: 03/15/2005
• Published: 05/04/2006
• Est. Priority Date: 03/15/2004
• Status: Active Grant

• Current Assignee: T.I.P.S. Messtechnik GmbH
• Original Assignee: T.I.P.S. Messtechnik GmbH
• Inventors: Gaggl, Rainer
• Granted Patent: US 7,295,021 B2
• Time in Patent Office: Days
• US Class Current: 324/754.07
• CPC Class Codes: G01R 1/06766 Input circuits therefor
• CPC Class Codes: G01R 1/07307 with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
• CPC Class Codes: G01R 1/36 Overload-protection arrangements or circuits for electric measuring instruments

Abstract

To limit the current in heavy current testing of semiconductor components with test needles, upstream of each needle a circuit is connected which has low resistance in the range of allowable currents and has high resistance above a given limit current in order to limit the current. The current source which undertakes limitation in the electrical supply lead to the probes is galvanically separated from the voltage supply of the current source itself.

Claims

1. Process for limiting the current in heavy current testing of semiconductor components with test needles, characterized in that upstream of each needle a circuit is connected which has low resistance in the range of allowable currents and has high resistance above a given limit current in order to limit the current.

2. Process as claimed in claim 1, wherein a circuit is used which contains at least one MOS-FET transistor or at least one bipolar transistor.

3. Process as claimed in claim 1, wherein the current source which undertakes limitation in the electrical supply lead to the probes is galvanically separated from the voltage supply of the current source itself.

4. Circuit for executing the process as claimed in claim 1, wherein between the current source and/or the test needle there is a circuit component which has high resistance above a given limit current in order to limit the magnitude of the current flowing through the test needles.

5. Circuit as claimed in claim 4, wherein the circuit component is a MOS-FET transistor or a bipolar transistor.

6. Circuit as claimed in claim 4, wherein the current source which undertakes limitation in the electrical supply lead to the probes is galvanically separated from the voltage supply of the current source itself.