Reuseable configuration data
First Claim
1. An information processor for executing a program comprising a plurality of separate program instructions:
- processing logic operable to individually execute said separate program instructions of said program;
an operand store operable to store operand values; and
an accelerator having an array comprising a plurality of functional units, said accelerator being operable to execute a combined operation corresponding to a computational subgraph of said separate program instructions by configuring individual ones of said plurality of functional units to perform particular processing operations associated with one or more processing stages of said combined operation;
wherein said accelerator executes said combined operation in dependence upon operand mapping data providing a mapping between operands of said combined operation and storage locations within said operand store and in dependence upon separately specified configuration data providing a mapping between said plurality of functional units and said particular processing operations such that said configuration data can be re-used for different operand mappings.
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Accused Products
Abstract
There is provided an information processor for executing a program comprising a plurality of separate program instructions: processing logic operable to individually execute said separate program instructions of said program; an operand store operable to store operand values; and an accelerator having an array comprising a plurality of functional units, said accelerator being operable to execute a combined operation corresponding to a computational subgraph of said separate program instructions by configuring individual ones of said plurality of functional units to perform particular processing operations associated with one or more processing stages of said combined operation; wherein said accelerator executes said combined operation in dependence upon operand mapping data providing a mapping between operands of said combined operation and storage locations within said operand store and in dependence upon separately specified configuration data providing a mapping between said plurality of functional units and said particular processing operations such that said configuration data can be re-used for different operand mappings.
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Citations
25 Claims
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1. An information processor for executing a program comprising a plurality of separate program instructions:
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processing logic operable to individually execute said separate program instructions of said program;
an operand store operable to store operand values; and
an accelerator having an array comprising a plurality of functional units, said accelerator being operable to execute a combined operation corresponding to a computational subgraph of said separate program instructions by configuring individual ones of said plurality of functional units to perform particular processing operations associated with one or more processing stages of said combined operation;
wherein said accelerator executes said combined operation in dependence upon operand mapping data providing a mapping between operands of said combined operation and storage locations within said operand store and in dependence upon separately specified configuration data providing a mapping between said plurality of functional units and said particular processing operations such that said configuration data can be re-used for different operand mappings. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
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22. A method of processing information under the control of a computer program comprising a plurality of separate program instructions, said method comprising:
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individually executing said separate program instructions of said program using processing logic;
storing operand values in an operand store;
executing a combined operation corresponding to a computational subgraph of said separate program instructions using an accelerator having an array comprising a plurality of functional units by configuring individual ones of said plurality of functional units to perform particular processing operations associated with one or more processing stages of said combined operation; and
executing said combined operation on said accelerator in dependence upon operand mapping data providing a mapping between operands of said combined operation and storage locations within said operand store and in dependence upon separately specified configuration data providing a mapping between said plurality of functional units and said particular processing operations such that said configuration data can be re-used for different operand mappings.
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23. A computer program on a carrier medium operable to compile a source code sequence comprising a plurality of separate program instructions of a computer program to form executable program instructions, said computer program comprising:
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analysis code for analysing said source code and translating said source code into a stream of executable program instructions capable of execution by processing logic within a data processing apparatus;
identifying code for identifying canditate computational subgraphs within said stream of executable program instructions;
subset selection code for selecting a subset of said canditate computational subgraphs for accelerated execution as respective combined operations on an accelerator having an array comprising a plurality of functional units, individual ones of said functional units being configurable to perform particular processing operations associated with one or more stages of said combined operations, said accelerator being operable to execute said combined operations in dependence upon operand mapping data providing a mapping between operands of said combined operation and storage locations within said operand store and in dependence upon separately specified configuration data; and
configuration data generating code for generating said configuation data providing a mapping between said plurality of functional units and said particular processing operations such that said configuration data can be re-used for different operand mappings.
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24. A method of compiling a source code sequence comprising a plurality of separate program instructions of a computer program to form executable program instructions, said method comprising:
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analysing said source code sequence and translating said source code sequence into a stream of executable program instructions capable of execution by processing logic within a data processing apparatus;
identifying canditate computational subgraphs within said stream of executable program instructions;
selecting a subset of said canditate computational subgraphs for accelerated execution as respective combined operations on an accelerator having an array comprising a plurality of functional units, individual ones of said functional units being configurable to perform particular processing operations associated with one or more stages of said combined operations, said accelerator being operable to execute said combined operations in dependence upon operand mapping data providing a mapping between operands of said combined operation and storage locations within said operand store and in dependence upon separately specified configuration data; and
generating configuation data providing a mapping between said plurality of functional units and said particular processing operations such that said configuration data can be re-used for different operand mappings.
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25. An information processor for executing a program comprising a plurality of separate program instructions:
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means for processing operable to individually execute said separate program instructions of said program;
means. for storing operand values; and
means for accelerating execution having an array comprising a plurality of functional units, said accelerating means being operable to execute a combined operation corresponding to a computational subgraph of said separate program instructions by configuring individual ones of said plurality of functional units to perform particular processing operations associated with one or more processing stages of said combined operation;
wherein said accelerating means executes said combined operation in dependence upon operand mapping data providing a mapping between operands of said combined operation and storage locations within said storing means and in dependence upon separately specified configuration data providing a mapping between said plurality of functional units and said particular processing operations such that said configuration data can be re-used for different operand mappings.
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Specification