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Processes, circuits, devices, and systems for branch prediction and other processor improvements

  • US 20060095750A1
  • Filed: 08/24/2005
  • Published: 05/04/2006
  • Est. Priority Date: 08/30/2004
  • Status: Active Grant
First Claim
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1. A processor for processing instructions comprising a pipeline including a fetch stage and an execute stage;

  • a first storing circuit associated with said fetch stage and operable to store a history of actual branches; and

    a second storing circuit associated with said fetch stage and operable to store a pattern of predicted branches, said second storing circuit coupled to said first storing circuit, said execute stage coupled back to said first storing circuit.

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