Semiconductor memory chip, semiconductor memory module and method for transmitting write data to semiconductor memory chips
First Claim
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1. A semiconductor memory chip comprising:
- an interface circuit configured to receive write data and to detect a transmission error in the received write data, wherein, upon detection of a transmission error by the interface circuit, the interface circuit is further configured to output, via a request signal path, a repeat request signal for the repeated transmission of a write datum detected as erroneous.
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Abstract
A semiconductor memory module includes a plurality of semiconductor memory chips. Each semiconductor memory chip includes an interface circuit that is configured to detect a transmission error in a write datum and is further configured to output, via a separate signal path, a repeat request signal for the repeated transmission of the write datum detected as erroneous. This repeat request signal can be transmitted either as a single-bit signal or as a multibit signal (e.g., serially as an individual signal line to a superordinate memory controller).
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Citations
18 Claims
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1. A semiconductor memory chip comprising:
an interface circuit configured to receive write data and to detect a transmission error in the received write data, wherein, upon detection of a transmission error by the interface circuit, the interface circuit is further configured to output, via a request signal path, a repeat request signal for the repeated transmission of a write datum detected as erroneous. - View Dependent Claims (2, 3)
- 4. A semiconductor memory module comprising a plurality of semiconductor memory chips, each semiconductor memory chip comprising an interface circuit configured to receive write data and to detect a transmission error in a received write datum, wherein, upon detection of a transmission error in the write data by an interface circuit, each interface circuit is configured to output, via a separate request signal path, a repeat request signal for the repeated transmission of a write datum detected as erroneous.
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9. A method for transmitting write data to a semiconductor memory chip, the method comprising:
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transmitting write data to the semiconductor chip externally via a data transmission path;
detecting a transmission error in the received write datum; and
upon detection of a transmission error in the received write datum, outputting a repeat request signal for the repeated transmission of a write datum detected as erroneous via a separate request signal path from the semiconductor memory chip. - View Dependent Claims (10, 11, 12)
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13. A method for transmitting write data to a plurality of semiconductor memory chips arranged on a semiconductor memory module, the method comprising:
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transmitting write data to at least one of the semiconductor memory chips externally via a data transmission path;
in each semiconductor memory chip, checking a received write datum and detecting a transmission error; and
upon detection of a transmission error in each semiconductor memory chip, outputting a repeat request signal for the repeated transmission of the write datum detected as erroneous via a separate request signal path from the respective semiconductor chip. - View Dependent Claims (14, 15, 16, 17, 18)
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Specification