Semiconductor device

• US 20060096299A1
• Filed: 11/01/2005
• Published: 05/11/2006
• Est. Priority Date: 11/11/2004
• Status: Active Grant

• Current Assignee: DENSO Corporation
• Original Assignee: DENSO Corporation
• Inventors: Teshima, Takanori, Mamitsu, Kuniaki
• Granted Patent: US 8,125,781 B2
• Time in Patent Office: Days
• US Class Current: 62/3.2
• CPC Class Codes: H01L 2224/40137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 23/40 Mountings or securing means for detachable cooling or heating arrangements heating H01L23/345; fixed by friction, plugs or springs
• CPC Class Codes: H01L 23/4012 for stacked arrangements of a plurality of semiconductor devices assemblies per se H01L25/00
• CPC Class Codes: H01L 23/473 by flowing liquids H01L23/4332, H01L23/4338 take precedence
• CPC Class Codes: H01L 25/115 the devices being arranged next to each other
• CPC Class Codes: H01L 25/117 Stacked arrangements of devices
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/1301 Thyristor
• CPC Class Codes: H01L 2924/1305 Bipolar Junction Transistor [BJT]
• CPC Class Codes: H01L 2924/13055 Insulated gate bipolar transistor [IGBT]
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/30107 Inductance
• CPC Class Codes: H05K 7/20927 Liquid coolant without phase change

Abstract

A semiconductor device comprises at least a semiconductor module including a semiconductor chip, a heat sink thermally connected to the semiconductor chip and a seal member for covering and sealing the semiconductor chip and the heat sink in such a manner as to expose the heat radiation surface of the heat sink. The radiation surface is cooled by a refrigerant. An opening is formed in a part of the seal member as a refrigerant path through which the refrigerant flows.

Claims

1. A semiconductor device comprising at least one semiconductor module including:

a semiconductor element;

a metal plate, thermally connected to the semiconductor element, for transmitting heat from the semiconductor element; and

a seal member for covering and sealing the semiconductor element and the metal plate in such a manner as to expose the heat radiation surface of the metal plate;

wherein the heat radiation surface of the metal plate is cooled by a refrigerant, and

wherein a part of the seal member is formed as a refrigerant path in which the refrigerant flows.

2. A semiconductor device according to claim 1,

wherein the seal member includes a sealing part for sealing the semiconductor element and the metal plate, and a wall part arranged around the sealing part and having an open end thereof positioned apart from the heat radiation surface of the metal plate, and

wherein an opening of the sealing part is formed as the refrigerant path between the metal plate and the wall part.

3. A semiconductor device according to claim 2,

wherein the wall part is arranged so as to surround the side of the metal plate.

4. A semiconductor device according to claim 1,

wherein the seal member includes a sealing part (51) for sealing the semiconductor element and the metal plate, and a wall part arranged around the sealing part and having an open end thereof positioned apart from the heat radiation surface of the metal plate, and

wherein an opening of the wall part is formed as the refrigerant path.

5. A semiconductor device according to claim 1,

wherein the seal member is made of resin.

6. A semiconductor device according to claim 1,

wherein a part or all of the seal member is made of thermoplastic resin.

7. A semiconductor device according to claim 1,

wherein the heat radiation surface of the metal plate is rough.

8. A semiconductor device according to claim 1,

wherein the heat radiation surface of the metal plate has at least one fin projecting from the same surface.

9. A semiconductor device according to claim 1,

wherein the heat radiation surface of the metal plate is electrically insulated from the refrigerant.

10. A semiconductor device according to claim 9,

wherein the heat radiation surface of the metal plate is formed as the surface of the insulating layer on the surface of the metal plate.

11. A semiconductor device according to claim 1,

wherein the heat radiation surface of the metal plate is not electrically insulated from the refrigerant.

12. A semiconductor device according to claim 1,

wherein the inner wall surface of the refrigerant path is covered with a film having corrosion resistance against the refrigerant.

13. A semiconductor device according to claim 1,

wherein electrode terminals for main current are projected from one side of the semiconductor module, and

wherein control terminals are arranged on the opposite side of the semiconductor module.

14. A semiconductor device according to claim 1,

wherein a plurality of the semiconductor modules are stacked and connected, and the respective refrigerant paths communicate with each other.

15. A semiconductor device according to claim 2,

wherein a plurality of the semiconductor modules are stacked and connected to each other, and the respective refrigerant paths communicate with each other, and

wherein the semiconductor modules are connected at the open end surfaces of the wall parts.

16. A semiconductor device according to claim 15,

wherein the end surfaces of the wall parts have a convex or a concave part for positioning.

17. A semiconductor device according to claim 15,

wherein the end surfaces of the wall parts are bonded.

18. A semiconductor device according to claim 17, wherein the end surfaces of the wall part are bonded by melting the end surfaces.

19. A semiconductor device according to claim 18, wherein the wall parts are made of at least thermoplastic resin and the end surfaces of the wall part are bonded by melting the thermoplastic resin.

20. A semiconductor device according to claim 15,

wherein the heat radiation surfaces of the metal plates of the stacked semiconductor modules are placed opposite with each other,

wherein the heat radiation surfaces of the metal plates have at least one fin projecting therefrom, and

wherein the height hf of the fin and the height D of the wall part from the heat radiation surface of the metal plate have the relation hf<

D.

21. A semiconductor device according to claim 15,

wherein the heat radiation surfaces of the metal plate of the stacked semiconductor modules are placed opposite with each other,

wherein the heat radiation surfaces of the metal plate have at least one fin projecting therefrom,

wherein the height hf of the fin and the height D of the wall part from the heat radiation surfaces of the metal plate have the relation hf≧

D, and

wherein positions of the fins on the heat radiation surfaces differ between one of the heat radiation surface and the other opposite heat radiation surface.

22. A semiconductor device according to claim 21,

wherein the fins have a form similar to teeth of a comb projected from the heat radiation surfaces of the metal plates, and

wherein the fins on one of the heat radiation surfaces are placed between the fins on the other opposite heat radiation surface.

23. A semiconductor device according to claim 15,

wherein the side shape of the wall part of the seal member is an inverted tropezoid.

24. A semiconductor device according to claim 4,

wherein a plurality of the semiconductor modules are stacked and connected to each other, and the respective refrigerant paths communicate with each other, and

wherein the semiconductor modules are connected at the side surfaces of the wall parts.

25. A semiconductor device according to claim 24,

wherein the side surfaces of the wall parts has a convex or a concave for positioning.

26. A semiconductor device according to claim 24,

wherein the side surfaces of the wall parts are bonded.

27. A semiconductor device according to claim 26, wherein the side surfaces of the wall part are bonded by melting the end surfaces.

28. A semiconductor device according to claim 27, wherein the wall parts are made of at least thermoplastic resin and the side surfaces of the wall part are bonded by melting the thermoplastic resin.

29. A semiconductor device according to claim 4,

wherein a plurality of the semiconductor modules are stacked and connected to each other, and the respective refrigerant paths communicate with each other, and

wherein the semiconductor modules are connected at the end surfaces of the wall parts.

30. A semiconductor device according to claim 29,

wherein the end surfaces of the wall parts has a convex or a concave for positioning.

31. A semiconductor device according to claim 29,

wherein the end surfaces of the wall parts are bonded.

32. A semiconductor device according to claim 31, wherein the side surfaces of the wall part are bonded by melting the end surfaces.

33. A semiconductor device according to claim 32, wherein the wall parts are made of at least thermoplastic resin and the end surfaces of the wall part are bonded by melting the thermoplastic resin.

34. A semiconductor device according to claim 15,

wherein the heat radiation surfaces of the metal plates of the stacked semiconductor modules are placed opposite with each other,

wherein the heat radiation surfaces of the metal plates have at least one fin projecting therefrom, and

wherein the height hf of the fin and the height D of the wall part from the heat radiation surface of the metal plate have the relation hf<

D.

35. A semiconductor device according to claim 15,

wherein the heat radiation surfaces of the metal plate of the stacked semiconductor modules are placed opposite with each other,

wherein the heat radiation surfaces of the metal plate have at least one fin projecting therefrom,

wherein the height hf of the fin and the height D of the wall part from the heat radiation surfaces of the metal plate have the relation hf≧

D, and

wherein positions of the fins on the heat radiation surfaces differ between one of the heat radiation surface and the other opposite heat radiation surface.

36. A semiconductor device according to claim 21,

wherein the fins have a form similar to teeth of a comb projected from the heat radiation surfaces of the metal plates, and

wherein the fins on one of the heat radiation surfaces are placed between the fins on the other opposite heat radiation surface.

37. A semiconductor device according to claim 29,

wherein the wall part comprises an upper portion and a lower portion, wherein the upper portion is projected further from the heat radiation surface of the metal plate than the lower portion.

38. A semiconductor device according to claim 14,

wherein the stacked semiconductor modules are configured as a power circuit.

39. A semiconductor device according to claim 38,

wherein a first bus bar and a second bus bar forming the input wiring of the power circuit are arranged in proximity and parallel to each other.

40. A semiconductor device according to claim 39,

wherein an insulating member is interposed between the first bus bar and the second bus bar.

41. A semiconductor device according to claim 39,

wherein the first bus bar and the second bus bar are covered and sealed by the insulating member.

42. A semiconductor device according to claim 14, further comprising at least another component module sealed with a seal member having a refrigerant path,

wherein the component modules are stacked together with the semiconductor modules, and

cooled together by the refrigerant.

43. A semiconductor device according to claim 1,

wherein the metal plate of the semiconductor module is formed on at least one surface of the semiconductor element, and

wherein only the surface of the metal plate formed on the one surface of the semiconductor element is exposed from the seal member and formed as the heat radiation surfaces.

44. A semiconductor device according to claim 14,

wherein visible surfaces of the stacked semiconductor modules are formed as the printing surfaces of the semiconductor modules.

45. A semiconductor device according to claim 14,

wherein the stacked semiconductor modules are connected to each other by being held under pressure by cover plates arranged at the ends of the stacked semiconductor modules, and further

the adjoining semiconductor modules are kept in contact with an O-ring so as to seal contact portions between the semiconductor modules.