Flat panel display

• US 20060097628A1
• Filed: 10/20/2005
• Published: 05/11/2006
• Est. Priority Date: 11/08/2004
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Mobile Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Kang, Tae-Wook, Suh, Mi-Sook, Lee, Ul-Ho
• Granted Patent: US 7,605,784 B2
• Time in Patent Office: Days
• US Class Current: 313/504
• CPC Class Codes: G09G 2300/0452 Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
• CPC Class Codes: G09G 2300/0819 used for counteracting undesired variations, e.g. feedback or autozeroing
• CPC Class Codes: G09G 2300/0842 forming a memory circuit, e.g. a dynamic memory with one capacitor
• CPC Class Codes: G09G 2300/0861 with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
• CPC Class Codes: G09G 2320/0223 Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
• CPC Class Codes: G09G 2320/0233 Improving the luminance or brightness uniformity across the screen
• CPC Class Codes: G09G 3/3233 with pixel circuitry controlling the current through the light-emitting element
• CPC Class Codes: H10K 2102/3026 Top emission
• CPC Class Codes: H10K 59/131 Interconnections, e.g. wiring lines or terminals
• CPC Class Codes: H10K 59/35 comprising red-green-blue [RGB] subpixels

Abstract

A flat panel display with good color mixture of three primary colors to achieve different hues and little signal delay is provided. The display includes signal lines including scan lines and data lines intersecting the scan lines, both arranged along straight lines. Red, green, and blue pixel driving circuit regions are defined by the intersection of the scan lines and the data lines. The pixel driving circuit regions having the same color are arranged adjacent to one another along a column direction. Red, green, and blue pixel driving circuits are placed in the pixel driving circuit regions and are coupled to the red, green, and blue pixel electrodes. The pixel electrodes are adjacent to pixel electrodes of a different color along both row and column directions.

Claims

1. A flat panel display comprising:

a substrate;

signal lines arranged on the substrate;

pixel driving circuits placed in pixel driving circuit regions defined by intersection of the signal lines; and

pixel electrodes coupled to each pixel driving circuit and overlapping at least one of the signal lines.

2. The flat panel display as claimed in claim 1, wherein the pixel electrodes are arranged in a first arrangement pattern and the pixel driving circuit regions are arranged in a second arrangement pattern, the first arrangement pattern being different from the second arrangement pattern.

3. The flat panel display as claimed in claim 1, wherein the pixel driving circuit regions corresponding to a same color are arranged adjacent to one another along a column direction.

4. The flat panel display as claimed in claim 3, wherein the pixel electrodes are arranged in a first arrangement pattern and the pixel driving circuit regions are arranged in a second arrangement pattern, the first arrangement pattern being different from the second arrangement pattern.

5. The flat panel display as claimed in claim 4, wherein the pixel electrodes of one color are adjacent to the pixel electrodes of a different color along row and column directions.

6. The flat panel display as claimed in claim 5, wherein the pixel electrodes are arranged in a delta arrangement.

7. The flat panel display as claimed in claim 1, wherein the signal lines include scan lines and data lines intersecting the scan lines, the scan lines and the data lines extending along straight lines.

8. The flat panel display as claimed in claim 7, wherein the signal lines further include power lines intersecting the scan lines and extending along straight lines.

9. The flat panel display as claimed in claim 1, further comprising an insulating layer interposed between at least one of the signal lines and the pixel electrodes having a thickness of 5000 Å

or more.

10. The flat panel display as claimed in claim 9, wherein the insulating layer interposed between the at least one of the signal lines and the pixel electrodes having a thickness of 3 μ

m or less.

11. The flat panel display as claimed in claim 1, wherein the flat panel display is an organic light emitting display.

12. The flat panel display as claimed in claim 1, wherein the pixel electrodes are formed from a reflective conductive layer.

13. The flat panel display as claimed in claim 1, wherein the pixel electrodes are formed from a transparent conductive layer, and the flat panel display further comprises a reflective layer pattern formed under the transparent conductive layer.

14. A flat panel display comprising:

a substrate;

signal lines arranged on the substrate;

pixel driving circuit regions defined by intersection of the signal lines;

pixel driving circuits placed in the pixel driving circuit regions; and

pixel electrodes coupled to the pixel driving circuits, wherein the pixel electrodes are arranged in a first arrangement pattern and the pixel driving circuit regions are arranged in a second arrangement pattern, the first arrangement pattern being different from the second arrangement pattern.

15. The flat panel display as claimed in claim 14, wherein the pixel driving circuit regions corresponding to a same color are arranged adjacent to one another along a column direction.

16. The flat panel display as claimed in claim 14, wherein the pixel electrodes are adjacent to pixel electrodes of a different color along row and column directions.

17. The flat panel display as claimed in claim 16, wherein the pixel electrodes are arranged in a delta arrangement.

18. The flat panel display as claimed in claim 14, wherein the signal lines include scan lines and data lines intersecting the scan lines, the scan lines and the data lines extending along straight lines.

19. The flat panel display as claimed in claim 18, wherein the signal lines further include power lines intersecting the scan lines and extending along straight lines.

20. The flat panel display as claimed in claim 14, wherein the flat panel display is an organic light emitting display.

21. The flat panel display as claimed in claim 14, wherein the pixel electrodes are formed from a reflective conductive layer.

22. The flat panel display as claimed in claim 14, wherein the pixel electrodes are formed from a transparent conductive layer, and the flat panel display further comprises a reflective layer pattern formed under the transparent conductive layer.

23. A flat panel display comprising:

a substrate;

signal lines arranged on the substrate, the signal lines including scan lines and data lines intersecting the scan lines, the scan lines and the data lines arranged along straight lines;

pixel driving circuit regions defined by the intersection of the scan lines and the data lines;

pixel driving circuits placed in the pixel driving circuit regions; and

pixel electrodes coupled to the pixel driving circuits, the pixel electrodes being adjacent to pixel electrodes of a different color along row and column directions.

24. The flat panel display as claimed in claim 23, wherein the signal lines include power lines intersecting the scan lines and arranged along straight lines.

25. The flat panel display as claimed in claim 23, wherein the pixel driving circuit regions of a same color are arranged adjacent to one another along a column direction.

26. The flat panel display as claimed in claim 23, wherein the pixel electrodes are arranged in a delta arrangement.

27. The flat panel display as claimed in claim 23, wherein the flat panel display is an organic light emitting display.

28. The flat panel display as claimed in claim 23, wherein the pixel electrodes are formed from a reflective conductive layer.

29. The flat panel display as claimed in claim 23, wherein the pixel electrodes are formed from a transparent conductive layer, and the flat panel display further comprises a reflective layer pattern formed under the transparent conductive layer.

30. A flat panel display comprising:

a substrate;

signal lines arranged on the substrate, the signal lines including scan lines and data lines intersecting the scan lines, the scan lines and the data lines arranged along straight lines;

red, green, and blue pixel driving circuit regions defined by the intersection of the scan lines and the data lines, the pixel driving circuit regions of a same color among the pixel driving circuit regions being arranged adjacent to one another along a column direction;

red, green, and blue pixel driving circuits located in the red, green, and blue pixel driving circuit regions, respectively; and

red, green, and blue pixel electrodes coupled to the red, green, and blue pixel driving circuits respectively, the red, green, and blue pixel electrodes being adjacent to pixel electrodes of a different color along row and column directions.

31. The flat panel display as claimed in claim 30, wherein the pixel electrodes are arranged in a delta arrangement.

32. The flat panel display as claimed in claim 30, wherein the flat panel display is an organic light emitting display.

33. The flat panel display as claimed in claim 30, wherein the pixel electrodes are formed from a reflective conductive layer.

34. The flat panel display as claimed in claim 30, wherein the pixel electrodes are formed from a transparent conductive layer, and the flat panel display further comprises a reflective layer pattern formed under the transparent conductive layer.