Controller arrangement with automatic power down
First Claim
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1. A control circuit, comprising:
- a single input terminal for receiving digital control signals and analog control signals;
said digital signals being in a first digital state when below a first level, and being in a second digital state when above a second level;
said analog signals being within a range that is greater than said first level and less than said second level;
a comparator circuit coupled to said single input terminal for providing a first output when the level at said single input terminal is below said first level or when the level at said single input terminal is above said second level;
said comparator circuit providing a second output when the level at said single input terminal is between said first level and said second level, said first output indicates that a signal at said single input terminal is a digital signal and said second output indicates that a signal at said single input terminal is an analog signal;
aid a power control circuit coupled to said single input terminal, said power control circuit operable to reduce power applied to said control circuit when a predetermined condition exists at said single input terminal for a predetermined period of time.
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Abstract
A control circuit is described in which a single input terminal receives digital control signals and analog control signals. In accordance with the principles of the invention, the control circuit includes an automatic power down circuit to place the control circuit into a low power draw or “sleep” mode whenever predetermined conditions are present. The automatic power down circuit monitors the single input terminal and when no demand for motor operation occurs for a predetermined period of time, the automatic power down circuit operates to place the control circuit into the low power draw mode.
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Citations
29 Claims
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1. A control circuit, comprising:
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a single input terminal for receiving digital control signals and analog control signals;
said digital signals being in a first digital state when below a first level, and being in a second digital state when above a second level;
said analog signals being within a range that is greater than said first level and less than said second level;
a comparator circuit coupled to said single input terminal for providing a first output when the level at said single input terminal is below said first level or when the level at said single input terminal is above said second level;
said comparator circuit providing a second output when the level at said single input terminal is between said first level and said second level, said first output indicates that a signal at said single input terminal is a digital signal and said second output indicates that a signal at said single input terminal is an analog signal;
aida power control circuit coupled to said single input terminal, said power control circuit operable to reduce power applied to said control circuit when a predetermined condition exists at said single input terminal for a predetermined period of time.
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2. A control circuit in accordance with clam 1, wherein:
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said comparator circuit comprises;
a first comparator operable to determine if said level at said single input terminal is below said first level; and
a second comparator operable to determine if said level at said single input terminal is above said second level. - View Dependent Claims (3)
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4. A method of operating a control circuit, comprising:
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receiving signals at a single input terminal that may be digital signals and analog control signals;
determining whether the level of a signal at said single input terminal is below a first level;
determining whether said level of said signal at said single input terminal is above said second level;
providing a fist output if said level is below said first level or if said level is above said second level; and
providing a second output if said level is between said first level and said second level;
whereby said first output indicates that a signal at said single input terminal is a digital signal and said second output indicates that a signal at said single input terminal is an analog signal. - View Dependent Claims (5, 6)
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7. A control circuit, comprising:
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a single input terminal for receiving digital signals and analog control signals;
said digital signals being in a first digital state when below a first level, and being in a second digital state when above a second level;
said analog signals being within a range that is greater than said first level and less than said second level;
a comparator circuit coupled to said single input terminal for providing a first output when the level at said single input terminal is below said first level or when the level at said single input terminal is above said second level;
said comparator circuit providing a second output when the level at said single input terminal is between said first level and said second level;
an oscillatory, said oscillator providing a pulse waveform at a first output and as saw tooth waveform at a second output;
a pulse width modulated comparator having a first input coupled to said single input terminal and a second input coupled to said oscillator second output and having an output;
a circuit coupled to said comparator, said oscillator first output and to said pulse width modulated comparator output, said circuit operable to generate pulse width modulated control signals in response to digital input signals at said single input terminal and in response to analog input signals at said single input terminal; and
a power control circuit coupled to said single input terminal, said power control circuit operable to reduce power applied to said control circuit when no signal is present at said single input terminal for a predetermined period of time. - View Dependent Claims (8, 9, 10)
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11. A method of providing control signals, comprising:
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providing a single input terminal;
receiving digital signals at said input terminal, said digital signals being in a first digital state when below a first level, and being in a second digital state when above a second level;
receiving analog signals at said input terminal said analog signals being within a range that is greater than said first level and less than said second level;
comparing signal levels at said input terminal to said first and said second levels;
providing a first output when the level at said input terminal is below said first level or when the level at said input terminal is above said second level;
providing a second output when the level at said input terminal is between said first level and said second level;
generating pulse width modulated control signals ill response to digital input signals at said single input terminal and in response to analog input signals at said single input terminal;
monitoring said single input terminal with a power control circuit; and
reducing power to said control circuit when the signal level at said single input terminal is below said first level for a predetermined period of time. - View Dependent Claims (12)
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13. A motor controller for a brushless direct current motor, comprising:
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an input terminal for receiving an analog control signal and a digital control signal;
a control circuit coupled to a single input terminal, said control circuit being responsive to digital input signals and analog input signals at said single input terminal to provide pulse width modulated control signals;
a motor drive circuit controlled by said control circuit and coupleable to a brushless direct current motor for energizing said motor; and
a power control circuit coupled to said single input terminal to reduce power applied to said motor controller when no signal is present at said single input terminal for a predetermined period of time, said power control circuit restoring power to said motor controller when a signal is present at said single input terminal. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24)
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25. A PWM controller, comprising:
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an input terminal for receiving an analog control signal and a digital control signal;
a control circuit coupled to a single input terminal, said control circuit being responsive to digital input signals and to analog input signals at said single input terminal to provide pulse width modulated control signals;
a circuit controlled by said control circuit; and
a power control circuit coupled to said input terminal, said power control circuit operable to reduce power applied to said control circuit when no analog or digital control signal is present at said single input terminal for a predetermined period of time. - View Dependent Claims (26, 27, 28, 29)
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Specification