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Wafer-level sealed microdevice having trench isolation and methods for making the same

  • US 20060105503A1
  • Filed: 12/29/2005
  • Published: 05/18/2006
  • Est. Priority Date: 07/31/2003
  • Status: Active Grant
First Claim
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1. A method of making a microdevice having a hermetically sealed cavity, the method comprising the steps of:

  • providing a substrate having a top side and a bottom side;

    forming a conductive trace on the top side of the substrate, the conductive trace having a first end and a second end;

    forming an isolation layer over at least a portion of the top side of the substrate and the conductive trace;

    forming a gap in the substrate;

    attaching a microstructure to the first end of the conductive trace so that at least a substantial portion of the microstructure is positioned above the gap;

    providing a silicon cap and a silicon island, the silicon cap being separated from the silicon island by an isolation trench;

    attaching the silicon cap to the isolation layer formed on the top side of the substrate such that the silicon cap houses the microstructure and forms the hermetically sealed cavity; and

    attaching the silicon island to the second end of the conductive trace.

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