Communication system with reconfigurable hardware structure and reconfiguration method therefor

• US 20060105802A1
• Filed: 10/28/2005
• Published: 05/18/2006
• Est. Priority Date: 10/29/2004
• Status: Abandoned Application

• Current Assignee: Samsung Electronics Co. Ltd., Virginia Tech Intellectual Properties, Inc.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Lee, Jong-Suk, Heo, Jin-Woo, Kim, Jina, Reed, Jeffrey Hugh, Ha, Dong-Sam, Palat, Ramesh Chambil
• Application Number:
  US11/260,493
• Publication Number:
  US 20060105802A1
• Time in Patent Office: Days
• US Class Current: 455/550.100
• CPC Class Codes: H04B 1/707 using direct sequence modulation
• CPC Class Codes: H04B 2201/7071 with dynamic control of receiver resources
• CPC Class Codes: H04B 2201/70711 with modular structure

Abstract

A communication system is provided with a reconfigurable hardware structure to provide implementation flexibility while minimizing a reduction in low power consumption performance. The communication system includes a plurality of processing element (PE) blocks for processing data based on multiple wireless transmission standards, memories for storing data being processed or to be processed by the PE blocks, and a controller for controlling data processing in the PE blocks, a data input operation to the PE blocks and a data output operation from the PE blocks, and for controlling transmission of data being processed in and input/output to/from the PE blocks. Each of the PE blocks includes a plurality of PE modules, and each of the PE modules includes a predetermined number of PEs that perform different functions. Operation and input/output of the PE blocks, the PE modules and the PEs are controlled by the controller.

Claims

1. A communication system having a reconfigurable hardware structure, comprising:

a plurality of processing element (PE) blocks for processing data based on multiple wireless transmission standards;

a plurality of memories for storing data being processed or to be processed by the PE blocks; and

a controller for controlling data processing in the PE blocks, a data input operation to the PE blocks and a data output operation from the PE blocks, and for controlling transmission of data being processed in and input/output to/from the PE blocks;

wherein each of the PE blocks comprises a plurality of PE modules, and each of the PE modules comprises a predetermined number of PEs that perform different functions, and wherein an operation and input/output of the PE blocks, the PE modules and the PEs are controlled by the controller.

2. The communication system of claim 1, wherein the PEs are configured to support a wireless transmission standard of code division multiple access 2000 (CDMA2000) or wideband code division multiple access (WCDMA).

3. The communication system of claim 1, wherein each of the PE modules comprises:

a first module comprising a predetermined number of PEs that perform a bit-by-bit operation;

a second module comprising a predetermined number of PEs that perform a correlation operation on multi-bit input data;

a third module comprising a predetermined number of PEs that perform a multiplication and accumulation operation; and

a fourth module comprising a predetermined number of PEs that perform an addition and logic calculation operation.

4. The communication system of claim 3, wherein the first-module PEs are configured to serve as a code generator.

5. The communication system of claim 4, wherein the first module comprises dual-structured PEs that are configured to perform the same operation.

6. The communication system of claim 3, wherein the second module comprises dual-structured PEs that are configured to perform the same operation.

7. The communication system of claim 3, wherein each of the modules comprises four PEs.

8. The communication system of claim 1, wherein each of the memories comprises:

an input buffer for storing input data;

a local memory for storing data processed in the PE blocks; and

a global memory for storing data input to the PE blocks and data output from the PE blocks.

9. The communication system of claim 8, wherein the global memory comprises:

a transfer memory for storing data transmitted between the PE blocks; and

a block memory for storing data input to the PE blocks and data output from the PE blocks.

10. A communication system having a reconfigurable hardware structure, comprising:

first and second processing element (PE) blocks for processing data based on multiple wireless transmission standards;

an input buffer for storing input data;

a first block memory for storing data being processed or to be processed by the first PE block;

a second block memory for storing data being processed or to be processed by the second PE block;

a transfer memory for storing data transmitted between the first PE block and the second PE block; and

a controller for controlling data processing in the first and second PE blocks, a data input operation to the first and second PE blocks and a data output operation from the first and second PE blocks, and for controlling transmission of data being processed in and input/output to/from the first and second PE blocks;

wherein each of the first and second PE blocks comprises one or more PE modules, and each of the PE modules comprises a predetermined number of PEs that perform different functions, and wherein an operation and input/output of the first and second PE blocks, the PE modules and the PEs are controlled by the controller.

11. The communication system of claim 10, wherein the PEs are configured to support a wireless transmission standard of code division multiple access 2000 (CDMA2000) or wideband code division multiple access (WCDMA).

12. The communication system of claim 10, wherein the first PE block comprises:

at least one first module comprising a predetermined number of PEs that perform a bit-by-bit operation; and

a second module comprising a predetermined number of PEs that perform a correlation operation on multi-bit input data.

13. The communication system of claim 12, further comprising a local memory for storing data processed in the first and second modules.

14. The communication system of claim 12, wherein the first-module PEs serve as a code generator.

15. The communication system of claim 12, wherein the first module comprises dual-structured PEs that perform the same operation.

16. The communication system of claim 12, wherein the second module comprises dual-structured PEs that perform the same operation.

17. The communication system of claim 12, wherein each of the modules comprises four PEs.

18. The communication system of claim 10, wherein the second PE block comprises:

a third module comprising a predetermined number of PEs that perform a multiplication and accumulation operation; and

at least one fourth module comprising a predetermined number of PEs that perform an addition and logic calculation operation.

19. The communication system of claim 18, further comprising a local memory for storing data processed in the third and fourth modules.

20. The communication system of claim 18, wherein each of the modules comprises four PEs.

21. A method for reconfiguring a communication system, comprising the steps of:

configuring a plurality of processing element (PE) blocks for processing data based on multiple wireless transmission standards, and configuring memories for storing data being processed or to be processed by the PE blocks;

configuring a controller for controlling data processing in the PE blocks, a data input operation to the PE blocks and a data output operation from the PE blocks, and for controlling transmission of data being processed in and input/output to/from the PE blocks;

configuring each of the PE blocks with a plurality of PE modules, and configuring each of the PE modules with a predetermined number of PEs that perform different functions; and

reconfiguring functions of the PEs by controlling operation and input/output of the PE blocks, the PE modules and the PEs using the controller.

22. The method of claim 21, wherein the PEs are configured to support a wireless transmission standard of code division multiple access 2000 (CDMA2000) or wideband code division multiple access (WCDMA).

23. The method of claim 21, wherein the step of configuring each of the PE modules with a predetermined number of PEs comprises the steps of:

configuring each of the PE modules with a first module comprising the predetermined number of PEs that perform a bit-by-bit operation;

configuring a second module comprising the predetermined number of PEs that perform a correlation operation on multi-bit input data;

configuring a third module comprising the predetermined number of PEs that perform a multiplication and accumulation operation; and

configuring a fourth module comprising the predetermined number of PEs that perform an addition and logic calculation operation.

24. The method of claim 23, wherein the controller uses the first-module PEs as a code generator.

25. The method of claim 24, wherein the first module comprises dual-structured PEs that perform the same operation.

26. The method of claim 23, wherein the second module comprises dual-structured PEs that perform the same operation.

27. The method of claim 23, wherein each of the modules comprises four PEs.

28. A method for reconfiguring a communication system, comprising the steps of:

configuring first and second processing element (PE) blocks for processing data based on multiple wireless transmission standards;

configuring an input buffer for storing input data;

configuring a first block memory for storing data being processed or to be processed by the first PE block;

configuring a second block memory for storing data being processed or to be processed by the second PE block;

configuring a transfer memory for storing data transmitted between the first PE block and the second PE block;

configuring a controller for controlling data processing in the first and second PE blocks, a data input operation to the first and second PE blocks and a data output operation from the first and second PE blocks, and for controlling transmission of data being processed in and input/output to/from the first and second PE blocks;

configuring each of the first and second PE blocks with one or more PE modules, and configuring each of the PE modules with a predetermined number of PEs that perform different functions; and

reconfiguring functions of the PEs by controlling operation and input/output of the first and second PE blocks, the PE modules and the PEs using the controller.

29. The method of claim 28, wherein the PEs are configured to support a wireless transmission standard of code division multiple access 2000 (CDMA2000) or wideband code division multiple access (WCDMA).

30. The method of claim 28, wherein the step of configuring the first PE block with a predetermined number of PE modules comprises the steps of:

configuring the first PE block with at least one first module comprising the predetermined number of PEs that perform a bit-by-bit operation; and

configuring a second module comprising the predetermined number of PEs that perform a correlation operation on multi-bit input data.

31. The method of claim 30, further comprising the step of configuring a local memory for storing data processed in the first and second modules.

32. The method of claim 30, wherein the controller uses the first-module PEs as a code generator.

33. The method of claim 30, wherein the first module comprises dual-structured PEs that perform the same operation.

34. The method of claim 30, wherein the second module comprises dual-structured PEs that perform the same operation.

35. The method of claim 30, wherein each of the modules comprises four PEs.

36. The method of claim 28, wherein the step of configuring the second PE block with a predetermined number of PE modules comprises the steps of:

configuring the second PE block with a third module comprising the predetermined number of PEs that perform a multiplication and accumulation operation; and

configuring at least one fourth module comprising the predetermined number of PEs that perform an addition and logic calculation operation.

37. The method of claim 36, further comprising the step of configuring a local memory for storing data processed in the third and fourth modules.

38. The method of claim 36, wherein each of the modules comprises four PEs.