Molecular self-assembly in substrate processing

• US 20060108320A1
• Filed: 11/22/2005
• Published: 05/25/2006
• Est. Priority Date: 11/22/2004
• Status: Active Grant

• Current Assignee: Intermolecular Incorporated
• Original Assignee: Intermolecular Incorporated
• Inventors: Keshavarz, Majid, Chiang, Tony P., Lazovsky, David E.
• Granted Patent: US 7,309,658 B2
• Time in Patent Office: Days
• US Class Current: 216/2
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: H01L 21/31 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques encapsulating layers H01L21/56; After treatment of these layers; Selection of materials for these layers
• CPC Class Codes: H01L 21/76805 the opening being a via or contact hole penetrating the underlying conductor
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/76846 Layer combinations
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 21/76879 by selective deposition of conductive material in the vias, e.g. selective C.V.D. on semiconductor material, plating plating on semiconductors in general H01L21/288
• CPC Class Codes: H01L 2221/1063 Sacrificial or temporary thin dielectric films in openings in a dielectric
• CPC Class Codes: H01L 23/5329 Insulating materials
• CPC Class Codes: H01L 28/65 comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)
• CPC Class Codes: H01L 29/06 characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 428/249953 Composite having voids in a component [e.g., porous, cellular, etc.]

Abstract

Systems and methods for molecular self-assembly are provided. The molecular self-assembly receives a substrate that includes one or more regions of dielectric material. A molecularly self-assembled layer is formed on an exposed surface of the dielectric material. The molecularly self-assembled layer includes material(s) having a molecular characteristic and/or a molecular type that includes one or more of a molecular characteristic and/or a molecular type of a head group of molecules of the material, a molecular characteristic and/or a molecular type of a terminal group of molecules of the material, and a molecular characteristic and/or a molecular type of a linking group of molecules of the material. The molecular characteristic(s) and molecular type(s) are selected according to at least one pre-specified property of the molecularly self-assembled layer.

Claims

1. A method comprising:

receiving a substrate comprising at least one dielectric material; and

forming a molecularly self-assembled layer on an exposed surface of the dielectric material, the molecularly self-assembled layer comprising at least one material having at least one of a molecular characteristic and a molecular type that includes one or more of a molecular type of a head group of molecules of the material, a molecular characteristic of a head group of molecules of the material, a molecular type of a terminal group of molecules of the material, a molecular characteristic of a terminal group of molecules of the material, a molecular type of a linking group of molecules of the material, and a molecular characteristic of a linking group of molecules of the material, wherein the at least one of the molecular characteristic and molecular type are selected according to at least one pre-specified property of the molecularly self-assembled layer.

2. The method of claim 1, further comprising preparing the exposed surface of the dielectric material, wherein preparing includes one or more of functionalization, cleaning, etching, rinsing, drying, vaporization, annealing, curing, thermal treatment, UV treatment, IR treatment, electron treatment, ion treatment, and x-ray treatment.

3. The method of claim 1, further comprising post-processing the molecularly self-assembled layer, wherein the post-processing includes one or more of functionalization, cleaning, etching, rinsing, drying, vaporization, annealing, curing, thermal treatment, UV treatment, IR treatment, electron treatment, ion treatment, and x-ray treatment.

4. The method of claim 1, wherein the at least one pre-specified property of the molecularly self-assembled layer includes one or more of pore sealing properties, adhesion properties, diffusion barrier properties, passivation properties, and selectivity.

5. The method of claim 1, wherein the at least one pre-specified property is specified according to at least one of an application of the molecularly self-assembled layer, a type of the dielectric material, and a type of the material to be subsequently formed on the molecularly self-assembled layer.

6. The method of claim 1, wherein the at least one pre-specified property includes a plurality of properties, further comprising assigning degrees of importance to each of the plurality of properties.

7. The method of claim 1, further comprising one or more of cross-linking, polymerizing, and oligomerizing molecules of the molecularly self-assembled layer.

8. The method of claim 1, wherein forming the molecularly self-assembled layer comprises joining complementary materials in nano-molecular action using coordinated action of independent molecules under distributed control.

9. The method of claim 1, wherein the dielectric material is a porous dielectric material, wherein the at least one of a molecular characteristic and a molecular type causes the molecularly self-assembled layer to seal a majority of pores of the exposed surface of the dielectric material

10. The method of claim 9, wherein the molecular type is an organic molecule and the molecular characteristic includes at least one of a size and a length of one or more of a terminal group and a linking group.

11. The method of claim 10, wherein the at least one of the molecular characteristic and the molecular type comprise a carbon chain including at least one of a linking group and a terminal group, wherein a length of at least one of the linking group and the terminal group is long enough relative to a size of the pores of the exposed surface so as to seal the pores.

12. The method of claim 9, wherein sealing of the majority of pores prevents diffusion of at least one of reactants, reagents, precursors, and carrier gases from subsequent depositions into the porous dielectric material.

13. The method of claim 1, further comprising etching at least one structure in the dielectric material.

14. The method of claim 13, wherein the at least one structure includes one or more of at least one via and at least one trench.

15. The method of claim 13, further comprising forming at least one deposited barrier layer on the molecularly self-assembled layer, wherein the deposited barrier layer prevents diffusion of other materials into the dielectric material.

16. The method of claim 15, further comprising forming at least one conductive layer on the at least one deposited barrier layer, wherein the at least one conductive layer comprises at least one electrically conductive material.

17. The method of claim 16, wherein the at least one conductive layer includes a seed layer.

18. The method of claim 16, further comprising filling the at least one structure with the at least one electrically conductive material.

19. The method of claim 16, wherein the at least one electrically conductive material includes one or more of copper, ruthenium, tungsten, and aluminum.

20. The method of claim 13, wherein the molecularly self-assembled layer forms a masking layer on the dielectric material.

21. The method of claim 20, further comprising cleaning the substrate, wherein the cleaning includes removing contamination from an electrically conductive material at a bottom portion of the at least one structure, wherein a portion of the contamination is captured in the masking layer.

22. The method of claim 21, wherein the masking layer protects the dielectric material during the cleaning.

23. The method of claim 21, wherein the cleaning generates an anchor area at the bottom portion of the at least one structure by removing a portion of the electrically conductive material at the bottom portion of the at least one structure.

24. The method of claim 23, further comprising forming a structural anchor in the anchor area by filling the anchor area with material of at least one of barrier layer deposition, seed layer deposition, and bulk copper fill during at least one of the barrier layer deposition, the seed layer deposition, and the bulk copper fill.

25. The method of claim 21, wherein the electrically conductive material is a metal, wherein the contamination includes at least one of organic contamination, metallic contamination, and metal oxide contamination.

26. The method of claim 21, further comprising removing the masking layer from at least a portion of the dielectric material, wherein removing the masking layer includes removing the contamination.

27. The method of claim 21, further comprising forming a capping layer over an exposed surface of the electrically conductive material at the bottom portion of the at least one structure.

28. The method of claim 27, wherein the forming of the metal alloy capping layer includes delivering and effecting a plating chemistry for electroless plating of the capping layer, wherein the capping layer is a metal alloy capping layer.

29. The method of claim 28, further comprising removing excess material of the capping layer.

30. The method of claim 29, further comprising removing the masking layer from at least a portion of the dielectric material, wherein removing the masking layer includes removing at least one of the contamination, material of the capping layer, and the excess material of the capping layer.

31. The method of claim 1, further comprising preparing the exposed surface, wherein the preparing further includes preparing an exposed surface of an electrically conductive material at a bottom portion of at least one structure of the dielectric material.

32. The method of claim 1, further comprising functionalizing at least one terminal group of the molecularly self-assembled layer by modifying at least one characteristic of the terminal group so as to generate a pre-specified interaction with at least one other material formed on the molecularly self-assembled layer.

33. The method of claim 1, further comprising selecting the at least one of the molecular characteristic and the molecular type to provide a pre-specified force of adhesion between the molecularly self-assembled layer and the dielectric material.

34. The method of claim 33, wherein the adhesion is produced by covalent bonding between molecules of at least one material, wherein the at least one material includes material of the molecularly self-assembled layer and the dielectric material.

35. The method of claim 33, wherein the adhesion includes covalent bonding between silicon and one or more of oxygen, carbon, and nitrogen.

36. The method of claim 33, wherein the at least one of the molecular characteristic and the molecular type includes a pre-specified head group for molecules of the material.

37. The method of claim 1, further comprising selecting the at least one of the molecular characteristic and the molecular type to provide a pre-specified force of adhesion between the molecularly self-assembled layer and at least one material formed on the molecularly self-assembled layer.

38. The method of claim 37, wherein the at least one of the molecular characteristic and the molecular type includes a pre-specified terminal group for molecules of the material.

39. The method of claim 1, wherein the dielectric material comprises a semiconductor substrate.

40. The method of claim 1, wherein the molecularly self-assembled layer is a monolayer.

41. The method of claim 1, wherein the molecularly self-assembled layer is a multilayer.

42. The method of claim 1, wherein the molecularly self-assembled layer comprises an organic material.

43. The method of claim 1, wherein the molecularly self-assembled layer comprises an inorganic material.

44. The method of claim 1, wherein the molecularly self-assembled layer comprises thiol molecules.

45. The method of claim 1, wherein the molecularly self-assembled layer comprises silicon-based molecules.

46. The method of claim 1, wherein the molecularly self assembled layer comprises at least one of a cluster of atoms, a cluster of functionalized atoms, nanoparticles, and functionalized nanoparticles.

47. The method of claim 1, wherein the molecularly self-assembled layer comprises molecules including organosilanes.

48. The method of claim 1, wherein the molecularly self-assembled layer comprises one or more of dendrimers, hyper-branched polymers, polymer brushes, and block co-polymers.

49. The method of claim 1, wherein a dielectric constant of the dielectric material is less than or equal to approximately 2.5.

50. The method of claim 9, wherein the size of the pores is approximately in a range of ten (10) angstroms to fifty (50) angstroms.

51. The method of claim 9, wherein a porosity of the dielectric material is equal to or less than approximately fifty percent (50%).

52. The semiconductor device produced by the method of claim 1.