Barrier material and process for Cu interconnect
First Claim
1. A semiconductor device having enhanced electromigration performance, the device comprising:
- a low-k dielectric layer, the low-k dielectric layer having a surface with a recessed feature;
a diffusion barrier layer on the surface of the low-k dielectric layer;
a glue layer on the diffusion barrier layer; and
a conductor on the glue layer, the conductor filling the recessed feature.
1 Assignment
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Accused Products
Abstract
A semiconductor diffusion barrier layer and its method of manufacture is described. The barrier layer includes of at least one layer of TaN, TiN, WN, TbN, VN, ZrN, CrN, WC, WN, WCN, NbN, AlN, and combinations thereof. The barrier layer may further include a metal rich surface. Embodiments preferably include a glue layer about 10 to 500 Angstroms thick, the glue layer consisting of Ru, Ta, Ti, W, Co, Ni, Al, Nb, AlCu, and a metal-rich nitride, and combinations thereof. The ratio of the glue layer thickness to the barrier layer thickness is preferably about 1 to 50. Other alternative preferred embodiments further include a conductor annealing step. The various layers may be deposited using PVD, CVD, PECVD, PEALD and/or ALD methods including nitridation and silicidation methods.
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Citations
43 Claims
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1. A semiconductor device having enhanced electromigration performance, the device comprising:
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a low-k dielectric layer, the low-k dielectric layer having a surface with a recessed feature;
a diffusion barrier layer on the surface of the low-k dielectric layer;
a glue layer on the diffusion barrier layer; and
a conductor on the glue layer, the conductor filling the recessed feature. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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19. A method of reducing electromigration effects in a copper damascene device, the method comprising:
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forming a low-k dielectric layer, the low-k dielectric layer having a surface with a recessed feature;
forming a diffusion barrier layer over the surface of the low-k dielectric layer;
forming a glue layer upon the diffusion barrier layer;
filing the recessed feature with a conductor;
annealing the conductor; and
forming a cap layer upon the conductor. - View Dependent Claims (20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32)
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33. A method for forming a semiconductor device, comprising:
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providing a substrate, the substrate including a low-k dielectric layer with an opening;
performing a pore sealing process;
forming a barrier layer within the opening;
forming a glue layer on the barrier layer;
forming a seed layer on the glue layer;
forming a conductor on the seed layer;
and forming a cap layer on the conductor. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40, 41, 42, 43)
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Specification