Method and circuit for controlling generation of a boosted voltage in devices receiving dual supply voltages

• US 20060114739A1
• Filed: 11/29/2004
• Published: 06/01/2006
• Est. Priority Date: 11/29/2004
• Status: Active Grant

• Current Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Incorporated (STMicroelectronics NV)
• Inventors: Taylor, Ronald T., Worley, James Leon
• Granted Patent: US 7,864,597 B2
• Time in Patent Office: Days
• US Class Current: 365/230.60
• CPC Class Codes: G11C 11/4074 Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
• CPC Class Codes: G11C 11/4085 Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
• CPC Class Codes: G11C 5/145 Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor G11C5/141 takes precedence

Abstract

A row driver circuit receives a first supply voltage and a second supply voltage. The circuit provides the first supply voltage on an output responsive to the first supply voltage being greater than a threshold value. The circuit generates a boosted voltage that is greater than the first supply voltage and provides that boosted voltage on the output responsive to the first supply voltage being less than the threshold value.

Claims

1. A row driver circuit adapted to receive a first supply voltage and a second supply voltage and operable to provide the first supply voltage on an output responsive to the first supply voltage being greater than a threshold value, and operable to generate a boosted voltage that is greater than the first supply voltage and provide that boosted voltage on the output responsive to the first supply voltage being less than the threshold value.

2. The row driver of claim 1 wherein the boosted voltage is greater than the first supply voltage by an approximately constant value.

3. The row driver of claim 1 wherein the boosted voltage is greater than the first supply voltage by a value that is a function of the second supply voltage.

4. The row driver of claim 3 wherein the first supply voltage corresponds to a pumped supply voltage Vpp and wherein the second supply voltage corresponds to a supply voltage Vdd.

5. The row driver of claim 1 wherein the threshold value equals a magnitude of the second supply voltage plus a transistor threshold value.

6. The row driver of claim 1 wherein the row driver is further operable to generate a boost enable signal, the boost enable signal being inactive responsive to the first supply voltage being greater than or equal to the threshold value and the boost enable signal being active responsive to the first supply voltage being less than the threshold value, and wherein the driver provides the boosted voltage on the output responsive to the boost enable signal being active.

7. A row driver circuit adapted to receive a first supply voltage and a second supply voltage and operable to provide the first supply voltage on an output responsive to a magnitude of the first supply voltage being greater than a threshold value plus a magnitude of the second supply voltage, and operable to generate a boosted voltage having a magnitude that is greater than the magnitude of the first supply voltage and to provide that boosted voltage on the output responsive to the magnitude of the first supply voltage being less than the threshold value plus the magnitude of the second supply voltage.

8. The row driver of claim 7 wherein the magnitude of the boosted voltage is greater than the magnitude of the first supply voltage by an approximately fixed value.

9. The row driver of claim 8 further comprising:

a compare circuit adapted to receive the second supply voltage and to receive a reference voltage that is equal to the first supply voltage minus the threshold value, the comparing circuit operable to generate an active boost enable signal responsive to the magnitude of the second supply voltage being greater than the reference voltage and operable to generate an inactive boost enable signal responsive to the magnitude of the second supply voltage being less than the reference voltage;

a voltage boost circuit coupled to the compare circuit and operable to generate the boosted voltage having a magnitude greater than the magnitude of the first supply voltage responsive to the active boost enable signal and operable to provide the first supply voltage responsive to the inactive boost enable signal; and

a driver circuit coupled to the voltage boost circuit and including an output adapted to be coupled to a word line, the driver circuit operable to provide either the boosted voltage or the first supply voltage on the output responsive to control signals.

10. The row driver of claim 9 wherein the compare circuit comprises a comparator.

11. The row driver of claim 9 wherein the voltage boost circuit comprises a charge pump circuit.

12. The row driver of claim 7 further comprising:

a compare circuit adapted to receive the second supply voltage and to receive a reference voltage that is equal to the first supply voltage minus the threshold value, the comparing circuit operable to generate an active boost enable signal responsive to the magnitude of the second supply voltage being greater than the reference voltage and operable to generate an inactive boost enable signal responsive to the magnitude of the second supply voltage being less than the reference voltage;

a variable voltage boost circuit coupled to the compare circuit and adapted to receive a plurality of reference voltage signals derived from the second supply voltage, the variable voltage boost circuit operable to generate the boosted voltage having a magnitude greater than the magnitude of the first supply voltage responsive to the active boost enable signal, with the magnitude of the boosted voltage being a function of values of the reference voltage signals, and the variable voltage boost circuit operable to provide the first supply voltage responsive to the inactive boost enable signal; and

a driver circuit coupled to the voltage boost circuit and including an output adapted to be coupled to a word line, the driver circuit operable to provide either the boosted voltage or the first supply voltage on the output responsive to control signals.

13. The row driver of claim 12 further comprising a voltage divider adapted to receive the second supply voltage and operable to derive the plurality of reference voltage signals from the second supply voltage, each reference voltage signal having a value that is a function of the magnitude of the second supply voltage.

14. The row driver of claim 13 wherein the compare circuit comprises a comparator.

15. The row driver of claim 14 wherein the voltage boost circuit comprises a charge pump circuit.

16. The row driver of claim 7 wherein the row driver is operable in a restore mode to provide either the first supply voltage or the boosted voltage on the output, and is further operable in a sense mode to provide the second supply voltage on the output.

17. A memory device, comprising:

a memory-cell array including a plurality of memory cells and a plurality of word lines, each memory cell being coupled to an associated word line;

read/write circuitry coupled to a data bus and the memory-cell array;

control circuitry coupled between a control bus and the memory-cell array; and

address decoder circuitry coupled to an address bus and to the memory-cell array, the address decoder circuitry including a row driver circuit adapted to receive a first supply voltage and a second supply voltage and operable to provide the first supply voltage on one of the word lines responsive to the first supply voltage being greater than or equal to a threshold value, and operable to generate a boosted voltage that is greater than the first supply voltage and provide that boosted voltage on the word line responsive to the first supply voltage being less than the threshold value.

18. The memory device of claim 17 wherein the memory-cell array comprises an array of dynamic random access memory cells.

19. The memory device of claim 17 wherein the boosted voltage is greater than the first supply voltage by an approximately constant value.

20. The memory device of claim 17 wherein the boosted voltage is greater than the first supply voltage by a value that is a function of the second supply voltage.

21. A computer system, comprising:

a data input device;

a data output device;

computer circuitry coupled to the data input and output devices; and

a memory device coupled to the computer circuitry, the memory device including,

a memory-cell array including a plurality of memory cells and a plurality of word lines, each memory cell being coupled to an associated word line;

read/write circuitry coupled to a data bus and the memory-cell array;

control circuitry coupled between a control bus and the memory-cell array; and

address decoder circuitry coupled to an address bus and to the memory-cell array, the address decoder circuitry including a row driver circuit adapted to receive a first supply voltage and a second supply voltage and operable to provide the first supply voltage on one of the word lines responsive to the first supply voltage being greater than or equal to a threshold value, and operable to generate a boosted voltage that is greater than the first supply voltage and provide that boosted voltage on the word line responsive to the first supply voltage being less than the threshold value.

22. The computer system of claim 21 wherein the memory device comprises a DRAM.

23. The computer system of claim 21 further comprising at least one data storage device coupled to the computer circuitry.

24. A method of generating a boosted voltage, comprising:

determining whether a magnitude of a first supply voltage is greater than a threshold value plus a magnitude of a second supply voltage;

when the magnitude of the first supply voltage is determined to be greater than the threshold value plus the magnitude of the second supply voltage,

generating the boosted voltage having a magnitude equal to the magnitude of the first supply voltage;

determining whether the magnitude of the first supply voltage is less than the threshold value plus the magnitude of the second supply voltage; and

when the magnitude of the first supply voltage is determined to be less than the threshold value plus the magnitude of the second supply voltage,

generating the boosted voltage having a magnitude that is greater than the magnitude of the first supply voltage.

25. The method of claim 24 wherein generating the boosted voltage having a magnitude that is greater than the magnitude of the first supply voltage comprises deriving the boosted voltage from the first supply voltage.

26. The method of claim 24 wherein generating the boosted voltage having a magnitude that is greater than the magnitude of the first supply voltage comprises generating the boosted voltage having a magnitude that is set amount greater than the magnitude of the first supply voltage.

27. The method of claim 24 wherein generating the boosted voltage having a magnitude that is greater than the magnitude of the first supply voltage comprises generating the boosted voltage having a magnitude that is a function of the magnitude of the second supply voltage.

28. A method of generating a boosted word line voltage to access addressed memory cells in a dynamic random access memory-cell array, the memory-cell array including a plurality of word lines and a plurality of access transistors, each access transistor having an associated threshold value, and the method comprising:

determining whether a magnitude of a pumped supply voltage is greater than or equal to the threshold value plus a magnitude of a lower supply voltage;

when the magnitude of the pumped supply voltage is greater than or equal to the threshold value plus the magnitude of the lower supply voltage,

generating the boosted word line voltage having a magnitude that is equal to the magnitude of the pumped supply voltage;

when the magnitude of the pumped supply voltage is less than the threshold value plus the magnitude of the lower supply voltage,

generating the boosted word line voltage having a magnitude that is greater than the magnitude of the pumped supply voltage; and

applying the boosted word line voltage on a word line associated with the addressed memory cells.

29. The method of claim 28 wherein generating the boosted word line voltage having a magnitude that is greater than the magnitude of the pumped supply voltage comprises generating the boosted word line voltage having a magnitude that is a set amount greater than the magnitude of the pumped supply voltage.

30. The method of claim 28 wherein generating the boosted word line voltage having a magnitude that is greater than the magnitude of the pumped supply voltage comprises generating the boosted word line voltage having a magnitude that is a function of the magnitude of the lower supply voltage.