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Micro-threaded memory

  • US 20060117155A1
  • Filed: 11/29/2004
  • Published: 06/01/2006
  • Est. Priority Date: 11/29/2004
  • Status: Active Grant
First Claim
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1. A memory device comprising:

  • storage banks each including a plurality of rows of storage cells, wherein a minimum time interval is imposed between successive accesses to a selected one of the rows of storage cells; and

    data path circuitry to transfer first data and second data between the storage banks and an external signal path during a first interval that is not longer than the minimum time interval, the first data being indicated by a first memory access request and the second data being indicated by a second memory access request.

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