Semiconductor device and fabrication method for the same

• US 20060118963A1
• Filed: 11/16/2005
• Published: 06/08/2006
• Est. Priority Date: 11/22/2004
• Status: Active Grant

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Yamada, Masaki
• Granted Patent: US 7,671,472 B2
• Time in Patent Office: Days
• US Class Current: 257/760
• CPC Class Codes: H01L 2224/04042 Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
• CPC Class Codes: H01L 23/5258 the change of state resulting from the use of an external beam, e.g. laser beam or ion beam
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 24/02 Bonding areas on insulating substrates, e.g. chip carriers, H01L23/49816, H01L23/49838, H01L23/5389; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 2924/01004 Beryllium [Be]
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01014 Silicon [Si]
• CPC Class Codes: H01L 2924/01015 Phosphorus [P]
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01022 Titanium [Ti]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01073 Tantalum [Ta]
• CPC Class Codes: H01L 2924/01074 Tungsten [W]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/04941 TiN
• CPC Class Codes: H01L 2924/04953 TaN

Abstract

A semiconductor device includes a first interlayer insulating film formed on a semiconductor substrate; a second interlayer insulating film formed on the first interlayer film and including a plurality of grooves; a first barrier metal formed on inner surfaces of the grooves; a first interconnect part and a first bonding electrode part including a copper film formed on the first barrier metal; a second barrier metal formed on the first interconnect part and the first bonding electrode part; a second interconnect part including a metal film formed on the first interconnect part via the second barrier metal; a second bonding electrode part including a metal film formed on the first bonding electrode part via the second barrier metal; and a third interlayer insulating film formed on the second interlayer insulating film, the second interconnect part, and the second bonding electrode part, and including an opening that allows exposure of the surface of the second bonding electrode part.

Claims

1. A semiconductor device comprising:

a first interlayer insulating film formed on a semiconductor substrate;

a second interlayer insulating film formed on the first interlayer film and including a plurality of grooves;

a first barrier metal formed on inner surfaces of the grooves;

a first interconnect part and a first bonding electrode part, including a copper film, formed on the first barrier metal;

a second barrier metal formed on the first interconnect part and the first bonding electrode part;

a second interconnect part, including a metal film, formed on the first interconnect part via the second barrier metal;

a second bonding electrode part, including a metal film, formed on the first bonding electrode part via the second barrier metal; and

a third interlayer insulating film formed on the second interlayer insulating film, the second interconnect part, and the second bonding electrode part, and including an opening that exposes the surface of the second bonding electrode part.

2. The semiconductor device of claim 1, wherein the first interconnect part and the second interconnect part form a stacked structure, are electrically connected, and are integral with each other.

3. The semiconductor device of claim 1, wherein the first interconnect part and the first bonding electrode part are covered by the first barrier metal and the second barrier metal.

4. The semiconductor device of claim 1, wherein width of the second interconnect part is wider than that of the first interconnect part.

5. The semiconductor device of claim 1, wherein width of the second bonding electrode part is wider than that of the first bonding electrode part.

6. The semiconductor device of claim 1, wherein the second interconnect part and the second bonding electrode part are aluminum.

7. The semiconductor device of claim 1, wherein a material including one of titanium and tantalum is used as the first barrier metal and the second barrier metal.

8. A semiconductor device comprising:

a first interlayer insulating film formed on a semiconductor substrate;

a second interlayer insulating film formed on the first interlayer film and including a plurality of grooves;

a first barrier metal formed on inner surfaces of the grooves;

a first interconnect part, including a copper film, formed on the first barrier metal;

a first bonding electrode part formed in the second interlayer insulating film;

a second barrier metal formed on the first interconnect part and the first bonding electrode part;

a second interconnect part, including a metal film, formed on the first interconnect part via the second barrier metal;

a second bonding electrode part, including a metal film, formed on the first bonding electrode part via the second barrier metal; and

a third interlayer insulating film formed on the second interlayer insulating film, the second interconnect part, and the second bonding electrode part, and including an opening that exposes the surface of the second bonding electrode part.

9. A semiconductor device comprising:

a first interlayer insulating film formed on a semiconductor substrate;

a second interlayer insulating film formed on the first interlayer film including a plurality of grooves;

a first barrier metal formed on inner surfaces of the grooves;

an interconnect part and a first bonding electrode part, including a copper film, formed on the first barrier metal;

a second barrier metal formed on the first interconnect part and the first bonding electrode part;

a fuse interconnect part, including a metal film, formed on the interconnect part via the second barrier metal;

a second bonding electrode part, including a metal film, formed on the first bonding electrode part via the second barrier metal; and

a third interlayer insulating film formed on the second interlayer insulating film, the fuse interconnect, and the second bonding electrode part;

wherein the third interlayer insulating film includes a concave part on the fuse interconnect part and an opening, which exposes the surface of the second bonding electrode part, on the second bonding electrode part.

10. The semiconductor device of claim 9, wherein the interconnect part is formed as a location other than beneath the concave part on the fuse interconnect part.

11. A semiconductor device fabrication method comprising:

forming a first interlayer insulating film on a semiconductor substrate;

forming a second interlayer insulating film including a plurality of grooves,- on the first interlayer film;

forming a first barrier metal on inner surfaces of the grooves;

forming a first interconnect part and a first bonding electrode part, including a copper film, on the first barrier metal;

forming a second barrier metal on the first interconnect part and the first bonding electrode part;

forming a metal film on the first interconnect part via the second barrier metal, and patterning the metal film and forming a second interconnect part on the first interconnect part via the second barrier metal;

depositing a metal film on the first bonding electrode part via the second barrier metal, and patterning the metal film and forming a second bonding electrode part on the first bonding electrode part via the second barrier metal; and

depositing a third interlayer insulating film on the entirety of the semiconductor substrate, and forming an opening on the third interlayer insulating film that exposes the surface of the second bonding electrode part.

12. The fabrication method of claim 11, wherein forming the second interconnect part includes patterning so as to cover the first interconnect part.

13. The fabrication method of claim 11, wherein forming the second bonding electrode part includes patterning so as to cover the surface of the first bonding electrode part.

14. The fabrication method of claim 11, wherein forming the first interconnect part and the first bonding electrode part further comprises:

depositing a copper film on the first barrier metal; and

planarizing the copper film and the first barrier metal until the second interlayer insulating film is exposed.

15. The fabrication method of claim 14, wherein planarizing the copper film and the first barrier metal is performed by etching back or CMP.

16. A semiconductor device fabrication method comprising:

forming a first interlayer insulating film on a semiconductor substrate;

forming film a second interlayer insulating film including a plurality of grooves, on the first interlayer;

forming a first barrier metal on inner surfaces of the grooves;

forming an interconnect part and a first bonding electrode part including a copper film, on the first barrier metal;

forming a second barrier metal on the interconnect part and the first bonding electrode part;

depositing a metal film on the second barrier metal, and patterning the metal film and forming a fuse interconnect part on the interconnect part;

depositing a metal film on the second barrier metal, and patterning the metal film and forming a second bonding electrode part on the first bonding electrode part; and

depositing a third interlayer insulating film on the entirety of the semiconductor substrate, and forming a concave part on the fuse interconnect part and the second bonding electrode part.

17. The fabrication method of claim 16 further comprising:

irradiating the fuse interconnect part with a laser beam; and

cutting the fuse interconnect part with the laser beam.

18. The fabrication method of claim 16, wherein the second bonding electrode part is aluminum.

19. The fabrication method of claim 16, wherein a material including one of titanium and tantalum is used as the first barrier metal and the second barrier metal.