Interleaved MEMS-based probes for testing integrated circuits

• US 20060125503A1
• Filed: 12/07/2005
• Published: 06/15/2006
• Est. Priority Date: 12/14/2004
• Status: Active Grant

• Current Assignee: Silicon Light Machines Corporation (SCREEN Holdings Co., Ltd.)
• Original Assignee: Silicon Light Machines Corporation (SCREEN Holdings Co., Ltd.)
• Inventors: Leung, Omar S.
• Granted Patent: US 7,330,038 B2
• Time in Patent Office: Days
• US Class Current: 324/755.110
• CPC Class Codes: B81B 2203/0118 Cantilevers
• CPC Class Codes: B81B 3/0067 Mechanical properties
• CPC Class Codes: G01R 1/06711 Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
• CPC Class Codes: G01R 1/06761 related to layers
• CPC Class Codes: G01R 1/07342 the body of the probe being at an angle other than perpendicular to test object, e.g. probe card
• CPC Class Codes: G01R 3/00 Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments , e.g. of probe tips

Abstract

In one embodiment, a probe card includes a substrate and a plurality of probes. Each of the probes may have a supported portion and an unsupported portion that meet at a base. The unsupported portion may have a non-uniform (e.g. triangular) cross-section along a length that begins at the base. The probes may be interleaved and fabricated using MEMS fabrication techniques.

Claims

1. An apparatus for testing an integrated circuit, the apparatus comprising:

a substrate;

a plurality of probes formed on the substrate, each of the probes being configured to contact a corresponding pad on a die, each of the probes having a supported portion fixedly attached to the substrate and an unsupported portion that flexes upon contact with a die pad, the unsupported portion having a non-uniform cross-section along a length that begins at a base where the supported portion and the unsupported portion meet.

2. The apparatus of claim 1 wherein the unsupported portion has a triangular shape.

3. The apparatus of claim 1 wherein the probes are interleaved and configured to test an array of die pads arranged along a single line.

4. The apparatus of claim 1 wherein the probes comprise a first set of probes and a second set of probes, the first set of probes having unsupported portions that have bases along a first line, the second set of probes having unsupported portions that have bases along a second line, and the first and second sets of probes having tips for contacting pads on the die along a third line that is between the first line and the second line.

5. The apparatus of claim 1 wherein the unsupported portion includes a tip with a single contact point.

6. The apparatus of claim 1 wherein the unsupported portion includes a tip with more than one contact point.

7. The apparatus of claim 1 wherein each of the probes comprise:

a compressive layer;

a tensile layer formed on the compressive layer; and

a conductive coating electroplated on the compressive layer and the tensile layer.

8. The apparatus of claim 7 wherein the compressive layer and the tensile layer comprise tungsten and the conductive coating comprises nickel.

9. The apparatus of claim 7 further comprising an electroplating adhesion layer formed to the tensile layer and the compressive layer.

10. The apparatus of claim 9 wherein the electroplating adhesion layer comprises aluminum.

11. The apparatus of claim 1 wherein each of the probes is configured to maintain a cylindrical profile as load is applied to it.

12. A method of fabricating a probe for contacting a pad of an integrated circuit die under test, the method comprising:

forming a sacrificial layer over a substrate;

forming a compressive layer over the sacrificial layer;

forming a tensile layer over the compressive layer; and

etching the sacrificial layer using a noble gas fluoride to allow the compressive layer and the tensile layer to curl up.

13. The method of claim 12 wherein the noble gas fluoride comprises xenon difluoride.

14. The method of claim 12 wherein the compressive layer and the tensile layer comprise tungsten.

15. The method of claim 12 further comprising:

prior to etching the sacrificial layer, forming a first electroplating adhesion layer on the sacrificial layer before forming the compressive layer and forming a second electroplating adhesion layer over the tensile layer.

16. The method of claim 15 further comprising:

electroplating a conductive coating on the first and second electroplating adhesion layers.

17. The method of claim 16 wherein the conductive coating comprises nickel.

18. An apparatus for testing an integrated circuit, the apparatus comprising:

a first set of probes, the probes in the first set of probes having unsupported portions that begin from bases formed on one side of a first line;

a second set of probes, the probes in the second set of probes having unsupported portions that begin from bases formed on another side of the first line;

wherein the first set of probes are interleaved with the second set of probes such that tips of the first and second sets of probes line up substantially along the first line.

19. The apparatus of claim 18 wherein the bases of the unsupported portions of the probes in the first set of probes are arranged along a second line and the bases of the unsupported portions of the probes in the second set of probes are arranged along a third line that is substantially in parallel with the first and second lines.

20. The apparatus of claim 18 wherein the unsupported portions of probes in the first and second sets of probes have non-uniform cross-section.