RFID tag design with circuitry for wafer level testing

• US 20060125505A1
• Filed: 12/15/2004
• Published: 06/15/2006
• Est. Priority Date: 12/15/2004
• Status: Active Grant

• Current Assignee: Impinj, Inc.
• Original Assignee: Impinj, Inc.
• Inventors: Oliver, Ronald A., Hyde, John D., Kuhn, Jay A., Hara, Dennis Kiyoshi, Glidden, Robert M.
• Granted Patent: US 7,307,528 B2
• Time in Patent Office: Days
• US Class Current: 324/750.300
• CPC Class Codes: G01R 31/2822 of microwave or radiofrequency circuits of attenuation, gain, e.g. using network analyzers G01R27/28
• CPC Class Codes: G01R 31/2831 Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates G01R31/318511 takes precedence; testing during manufacture H01L22/00
• CPC Class Codes: G01R 31/2884 using dedicated test connectors, test elements or test circuits on the IC under test G01R31/2855 takes precedence
• CPC Class Codes: G01R 31/3025 Wireless interface with the DUT

Abstract

Technologies suitable for on-wafer testing in the ubiquitous computing era are disclosed. Among the inventive features disclosed are: 1) clustering of wafer test probe landing area sites for parallel test sequencing; 2) on wafer test wiring that runs along the wafer'"'"'s scribe regions; 3) on-wafer test wiring that can be scribed and yet thwart the spread of contamination into the product die; 4) an RFID tag design that allows for on-wafer testing without imposing substantial semiconductor surface area penalty; 5) an RFID tag design that includes built-in self test (BIST) circuitry for the RFID tag'"'"'s non-volatile memory.

Claims

1. An apparatus, comprising:

an RFID tag comprising a receive signal path from one or more primary inputs to a controller, said receive signal path to process an electrical receive signal originating from said inputs as a consequence of said inputs having received a wireless signal, a second signal path flowing into said receive signal path from a die edge of said RFID tag, said second signal path to transport an electrical test signal that emulates said receive signal while said RFID tag is being tested on wafer, said receive signal path flowing through both a first input of a logic circuit and said logic circuit'"'"'s output, said logic circuit having a second input coupled to said second signal path.

2. The apparatus of claim 1 wherein the said logic circuit is a multiplexer

3. The apparatus of claim 1 wherein the said logic circuit is an OR gate.

4. The apparatus of claim 1 wherein said second signal path traces back to an open circuit, said open circuit caused by the scribing of said wafer.

5. The apparatus of claim 2 wherein, at the region of said open circuit, said signal path flows through said RFID tag'"'"'s semiconductor substrate prior to being opened as a result of a scribing each individual die from the wafer.

6. The apparatus of claim 1 wherein said multiplexer'"'"'s channel select input is coupled to a passive pull-up or pull-down resistor, or active equivalent, said pull- up or pull-down device(s) to cause said channel select input to have a first state while said RFID tag is being tested on wafer and a second state while said RFID tag is receiving said wireless signal.

7. The apparatus of claim 1 wherein said RFID tag further comprises a rectifier coupled to said input(s), a node where a supply voltage for said RFID tag is to appear residing downstream from an output of said rectifier, a diode'"'"'s cathode coupled to said node, said diode'"'"'s anode coupled to wiring that provides said RFID tag'"'"'s supply voltage while said RFID tag is being tested on wafer.

11. The apparatus of claim 7 wherein said receive signal path flows to a controller.

12. The apparatus of claim 11 wherein said controller is coupled to a non-volatile memory.

8. An apparatus, comprising:

an RFID tag comprising a receive signal path that flows from one or more primary inputs, said receive signal path to process an electrical receive signal originating from said inputs as a consequence of said inputs having received a wireless signal, said RFID tag further comprising a rectifier coupled to said inputs, a node where a supply voltage for said RFID tag is to appear residing downstream from an output of said rectifier, a diode'"'"'s cathode coupled to said node, said diode'"'"'s anode coupled to wiring that provides said RFID tag'"'"'s supply voltage while said RFID tag is being tested on wafer.

9. The apparatus of claim 8 wherein said RFID tag further comprises a multiplexer to multiplex between test signals generated while said RFID tag is being tested on wafer, said multiplexer having its power supply node coupled to said wiring.

10. The apparatus of claim 8 further comprising a second signal path flowing into said receive signal path from a die edge of said RFID tag, said second signal path to transport an electrical test signal that emulates said receive signal while said RFID tag is being tested on wafer, said receive signal path flowing through both a first input of a multiplexer and said multiplexer'"'"'s output, said multiplexer having a second input coupled to said second signal path, said multiplexer'"'"'s channel select input coupled to a passive pull-up or pull-down resistor, or active equivalent, said passive pull-up or pull-down device(s) to cause said channel select input to have a first state while said RFID tag is being tested on wafer and a second state while said RFID tag is receiving said wireless signal.

13. An apparatus, comprising:

an RFID tag comprising a receive signal path that flows from one or more primary inputs, said receive signal path to process an electrical receive signal originating from said inputs as a consequence of said inputs having received a wireless signal, said RFID tag also comprising a test signal path (possibly including active circuits) to transport a test signal while said RFID tag is being tested on wafer, said test signal path tracing from, or back to, an open circuit residing within the semiconductor substrate of said RFID tag, said open circuit caused by the scribing of said wafer.

14. The apparatus of claim 13 wherein said RFID tag further comprises a rectifier coupled to said inputs, a node where a supply voltage for said RFID tag is to appear residing downstream from an output of said rectifier, a diode'"'"'s cathode coupled to said node, said diode'"'"'s anode coupled to wiring that provides said RFID tag'"'"'s supply voltage while said RFID tag is being tested on wafer.

15. The apparatus of claim 14 wherein said RFID tag further comprises a second signal path flowing into said receive signal path from a die edge of said RFID tag, said second signal path to transport an electrical test signal that emulates said receive signal while said RFID tag is being tested on wafer.

16. The apparatus of claim 15 wherein said receive signal path flows through both a first input of a multiplexer and said multiplexer'"'"'s output, said multiplexer having a second input coupled to said second signal path.

17. The apparatus of claim 16 wherein said multiplexer'"'"'s channel select input is coupled to a passive pull-up or pull-down resistor, or active equivalent, said passive pull-up or pull-down device(s) to cause said channel select input to have a first state while said RFID tag is being tested on wafer and a second state while said RFID tag is receiving said wireless signal.

18. The apparatus of claim 17 wherein said test signal path is said second signal path.

19. The apparatus of claim 14 wherein said RFID tag further comprises a multiplexer to multiplex between test signals generated while said RFID tag is being tested on wafer, said multiplexer having its power supply node coupled to said wiring.

20. The apparatus of claim 14 wherein said receive signal path flows to a controller.

21. The apparatus of claim 20 wherein said controller is coupled to a non-volatile memory.

22. An apparatus, comprising:

an RFID tag comprising a receive signal path from one or more primary inputs to a controller, said receive signal path to process an electrical receive signal originating from said inputs as a consequence of said inputs having received a wireless signal, said RFID tag also comprising a response signal path that flows from said controller through an impedance controller to said inputs, said response signal path to communicate to a system that sends said wireless signal, a third signal path flowing from said response signal path to a die edge of said RFID tag, said third signal path to transport a response signal while said RFID tag is being tested on wafer.

23. The apparatus of claim 22 wherein said third signal path flows to an open circuit residing within the semiconductor substrate of said RFID tag, said open circuit caused by the scribing of said wafer.

24. The apparatus of claim 22 wherein said RFID tag further comprises a fourth signal path flowing into said receive signal path from a die edge of said RFID tag, said fourth signal path to transport an electrical test signal that emulates said receive signal while said RFID tag is being tested on wafer.

25. The apparatus of claim 24 wherein said receive signal path flows through both a first input of a multiplexer and said multiplexer'"'"'s output, said multiplexer having a second input coupled to said fourth signal path.

26. The apparatus of claim 25 wherein said fourth signal path traces back to an open circuit, said open circuit caused by the scribing of said wafer.

27. The apparatus of claim 26 wherein, at the region of said open circuit, said signal path flows through said RFID tag'"'"'s semiconductor substrate.

28. The apparatus of claim 25 wherein said multiplexer'"'"'s channel select input is coupled to a passive pull-up or pull-down resistor, or active equivalent, said passive pull-up or pull-down device(s) to cause said channel select input to have a first state while said RFID tag is being tested on wafer and a second state while said RFID tag is receiving said wireless signal.

29. The apparatus of claim 28 wherein said RFID tag further comprises a rectifier coupled to said inputs, a node where a supply voltage for said RFID tag is to appear residing downstream from an output of said rectifier, a diode'"'"'s cathode coupled to said node, said diode'"'"'s anode coupled to wiring that provides said RFID tag'"'"'s supply voltage while said RFID tag is being tested on wafer.

30. The apparatus of claim 22 wherein said RFID tag further comprises a rectifier coupled to said input(s), a node where a supply voltage for said RFID tag is to appear residing downstream from an output of said rectifier, a diode'"'"'s cathode coupled to said node, said diode'"'"'s anode coupled to wiring that provides said RFID tag'"'"'s supply voltage while said RFID tag is being tested on wafer.

31. A method, comprising:

applying a supply voltage to an RFID tag that has not yet been diced from its wafer, said supply voltage applied to said RFID tag at a die edge of said RFID tag, a channel of a multiplexer of said RFID tag being enabled as a consequence of said applying; and

,

propagating a test signal through said multiplexer channel as part of testing said RFID tag on wafer.

32. The method of claim 31 further comprising ceasing said application of said supply voltage to said RFID tag after said on wafer testing of said RFID tag is complete.

33. The method of claim 32 further comprising dicing said RFID tag from said wafer.

34. The method of claim 33 further comprising receiving a wireless signal at an input(s) of said RFID tag, said RFID tag generating a second supply voltage from an electrical receive signal that originates from said input(s), another channel of said multiplexer being enabled as a consequence of said generating.

35. The method of claim 34 wherein:

data carried by said wireless signal flows through said another channel; and

,

said test signal includes test data intended to emulate wirelessly received data.

36. The method of claim 35 wherein, prior to said propagating said test signal through said multiplexer, said test signal was propagated through a scribe region of said wafer.

37. The method of claim 31 wherein said test signal includes test data intended to emulate wirelessly received data.

38. The method of claim 37 wherein said RFID tag comprises a controller coupled to non-volatile memory, said test data being write data to be written into said non-volatile memory by said controller.

39. The method of claim 38 wherein said test signal includes a command for said controller that causes said controller to write said test data into said non- volatile memory.

40. The method of claim 39 further comprising sending a second command to said controller through said multiplexer channel as part of testing said RFID tag on wafer, said second command to cause said controller to read data from said non-volatile memory.

41. The method of claim 40 further comprising sending said data read from said non-volatile memory off said RFID tag to a wafer test probe.

42. The method of claim 31 further comprising after said applying and prior to said propagating:

specifically addressing said RFID tag from a wafer test probe, said test signal received by said RFID tag as well as other RFID tags on said wafer, said addressing to ensure that said test signal is applied at said RFID tag and not at said other RFID tags.

43. The method of claim 42 wherein said wafer test probe also sends said test signal.

44. The method of claim 42 wherein said addressing further comprises sending an RFID tag identifier to said RFID tag as well as said other RFID tags, said RFID tag identifier matching said RFID tag'"'"'s identifier and not any of said other RFID tags'"'"' identifiers, each identifier being uniquely coded into its respective RFID tag.

45. The method of claim 31 wherein said RFID tag comprises a controller coupled to non-volatile memory, said method comprising sending write data to said RFID tag as part of testing said RFID tag on wafer, said write data to be written into said non-volatile memory by said controller, said write data containing information that emulates said RFID tag'"'"'s identification.

46. The method of claim 31 wherein a multiplexer designed into said RFID tag is powered from said applying but not from said RFID tags generation of its supply voltage from its reception of a wireless signal.