On wafer testing of RFID tag circuit with pseudo antenna signal
First Claim
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1. A method for testing at least a portion of a semiconductor wafer containing a plurality of RFID tag circuits, comprising:
- propagating an excitation signal to a demodulator of a first one of the circuits, the excitation signal appearing on a net that couples an antenna port of the first circuit with the first circuit'"'"'s demodulator; and
then dicing the first circuit from the wafer portion.
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Abstract
An RFID tag circuit is described having a pair of signal paths that flow to an input of a demodulator of the RFID tag circuit. A first of the signal paths couple the demodulator to an antenna port of the RFID tag circuit. A second of the signal paths couple the demodulator to a location where a pseudo antenna signal first appears on the RFID tag circuit while the RFID tag circuit is being tested on-wafer.
68 Citations
55 Claims
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1. A method for testing at least a portion of a semiconductor wafer containing a plurality of RFID tag circuits, comprising:
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propagating an excitation signal to a demodulator of a first one of the circuits, the excitation signal appearing on a net that couples an antenna port of the first circuit with the first circuit'"'"'s demodulator; and
then dicing the first circuit from the wafer portion. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30)
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13. The method of clam 12 further comprising shorting the output signal with the second signal in order to create the excitation signal.
- 31. An RFID tag circuit comprising a pair of signal paths that flow to an input of a demodulator of the RFID tag circuit, a first of the signal paths coupling the demodulator to an antenna port of the RFID tag circuit, a second of the signal paths coupling the demodulator to a location where a pseudo antenna signal first appears on the RFID tag circuit while the RFID tag circuit is being tested on-wafer.
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45. The apparatus 31 wherein the second signal path comprises a series transistor.
Specification