In-line fabrication of curved surface transistors

• US 20060127817A1
• Filed: 12/10/2004
• Published: 06/15/2006
• Est. Priority Date: 12/10/2004
• Status: Abandoned Application

• Current Assignee: Eastman Kodak Company
• Original Assignee: Eastman Kodak Company
• Inventors: Hong, Yongtaek, Ramanujan, Sujatha
• Application Number:
  US11/009,801
• Publication Number:
  US 20060127817A1
• Time in Patent Office: Days
• US Class Current: 430/320
• CPC Class Codes: H01L 27/1292 using liquid deposition, e.g. printing
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
• CPC Class Codes: H01L 29/78603 characterised by the insulating substrate or support H01L29/78657 takes precedence

Abstract

A method for in-line fabrication of curved surface transistors (10) forms a flexible substrate (12) into a predetermined shape. A first passivation layer (14) is deposited. A first metal layer (16) in a first pattern is deposited. An insulator layer (18) in a second pattern is deposited. A first semiconductor (20) in a third pattern and a second semiconductor (22) in a fourth pattern are deposited. A second metal layer (24) in a fifth pattern is deposited. A second passivation layer (28) in a sixth pattern is deposited.

Claims

1. A method for in-line fabrication of curved surface transistors comprising:

forming a flexible substrate into a predetermined shape;

depositing a first passivation layer;

depositing a first metal layer in a first pattern;

depositing an insulator layer in a second pattern;

depositing a first semiconductor layer in a third pattern;

depositing a second semiconductor layer in a fourth pattern;

depositing a second metal layer in a fifth pattern; and

depositing a second passivation layer in a sixth pattern.

2. A method as in claim 1 wherein said first passivation layer is printed with inkjet.

3. A method as in claim 1 wherein at least some regions of said substrate is heated.

4. A method as in claim 1 wherein said first passivation layer is deposited in vacuum.

5. A method as in claim 1 wherein said first metal layer is printed with inkjet.

6. A method as in claim 5 wherein drop trajectories from said inkjet are determined by a curvature of said substrate.

7. A method as in claim 5 wherein placement of nozzles of said inkjet are determined by a curvature of said substrate.

8. A method as in claim 5 wherein a curvature of a printhead of said inkjet is determined by a curvature of said substrate.

9. A method as in claim 5 wherein a mask is placed in contact with said substrate.

10. A method as in claim 5 wherein a mask is placed in close proximity to said substrate.

11. A method as in claim 5 wherein a movable bar is placed in close proximity to said substrate.

12. A method as in claim 11 wherein said movable bar contains a receptacle.

13. A method as in claim 5 wherein a polymer mask is employed.

14. A method as in claim 1 wherein said insulating layer is deposited through plasma enhanced chemical vapor deposition.

15. A method as in claim 1 wherein said insulating layer is pattern through use of a inkjet printed wax mask.

16. A method as in claim 1 wherein said insulating layer is pattern through use of a photomask.

17. A method as in claim 1 wherein said first semiconducting layer is deposited through plasma enhanced chemical vapor deposition.

18. A method as in claim 1 wherein said first semiconducting layer is pattern through use of a inkjet printed wax mask.

19. A method as in claim 1 wherein said first semiconducting layer is pattern through use of a photomask.

20. A method as in claim 1 wherein said second semiconducting layer is deposited through plasma enhanced chemical vapor deposition.

21. A method as in claim 1 wherein said second semiconducting layer is pattern through use of a inkjet printed wax mask.

22. A method as in claim 1 wherein said second semiconducting layer is pattern through use of a photomask.

23. A method as in claim 1 wherein said second metal layer is printed with inkjet.

24. A method as in claim 1 wherein a polymer mask is employed.

25. A method as in claim 1 wherein the second metal layer is used as a mask for the etching of a back channel.

26. A method as in claim 1 wherein said second passivation layer is printed with inkjet.

27. A method as in claim 1 wherein said second passivation layer is deposited in vacuum.

28. A method for fabrication of curved surface transistors comprising:

forming a flexible substrate into a predetermined shape;

supporting said substrate in said flexible shape;

depositing a first passivation layer uniformly;

printing a first metal layer in a first pattern;

depositing an insulator layer in a second pattern;

depositing a first semiconductor layer in a third pattern;

depositing a second semiconductor layer in a fourth pattern;

printing a second metal layer in a fifth pattern; and

depositing a second passivation layer in a sixth pattern.

29. A method as in claim 28 wherein the printing method is inkjet printing.

30. A method as in claim 28 wherein the inkjet head is directed in path determined by a contour of the predetermined substrate shape.

31. A method as in claim 28 wherein the nozzles are directed in a path determined by a contour of the predetermined substrate shape

32. A method as in claim 28 wherein the substrate is held at an elevated temperature.

33. A method as in claim 28 where the substrate is positioned such that material that does not adhere is removed.

34. A method as in claim 28 where the position of the substrate is altered for each deposition step.

35. A method as in claim 28 wherein said fabrication is in-line.

36. A method as in claim 28 wherein drops from said inkjet printer are directed in a contour of said predetermined shape.

37. A method as in claim 28 wherein a seventh layer comprised of a scintillator material is applied.

38. A method as in claim 28 wherein a seventh layer comprised of a material selected from a group comprising emissive display material, reflective display material is applied.

39. A method for in-line fabrication of a curved surface transistors comprising:

forming a flexible substrate into a predetermined shape;

supporting said substrate in said flexible shape;

depositing a first uniform passivation layer;

printing a first metal layer in a first pattern;

depositing an insulator layer in a second pattern;

depositing a first semiconductor layer in a third pattern;

depositing a second semiconductor layer in a fourth pattern;

printing a second metal layer in a fifth pattern; and

depositing a second uniform passivation layer.

40. A method as in claim 39 wherein the printing method is continuous.

41. A method as in claim 39 wherein said in-line method is a drum printer.

42. A method as in claim 39 wherein the substrate is held at elevated temperature.

43. A method as in claim 39 where the substrate is positioned such that material that does not adhere is removed.

44. A method as in claim 39 where the position of the substrate is altered for each deposition step.

45. A method for fabrication of a curved surface transistors comprising:

forming a flexible substrate into a predetermined shape;

supporting said substrate in said predetermined shape;

depositing a first uniform passivation layer;

applying a first wax mask over said first uniform passivation layer;

printing a first metal layer in a first pattern;

removing said first wax mask;

depositing a first insulator layer;

depositing a first semiconductor layer;

depositing a second semiconductor layer;

forming a second pattern in said first and second semiconductor layer;

forming a third pattern in said insulator layer;

applying a second wax mask;

printing a second metal layer in a fourth pattern;

removing said second wax mask;

removing said second semiconductor layer in a back channel region;

depositing a second uniform passivation layer; and

forming a fifth pattern in said second uniform passivation layer.

46. A method for fabrication as in claim 45 wherein said first and second semiconductor layers are amorphous silicon.

47. A method for fabrication as in claim 45 wherein said first insulator layer is a single layer selected from a group comprised amorphous silicon nitride or amorphous silicon oxide.

48. A method as in claim 45 wherein said first insulator layer is a double layer of said amorphous silicon nitride and silicon oxide.

49. An apparatus for in-line fabrication of transistors on a curved surface of a flexible substrate comprising:

a plurality of curved web mounts wherein each web mount encloses deposition equipment;

a first curved web mount wherein first deposition equipment deposits a passivation layer on said substrate;

a second curved web mount wherein second deposition equipment deposits a first metal layer in a first pattern;

a third curved web mount wherein third deposition equipment deposits an insulator layer, a first semiconductor layer, and a second semiconductor layer;

a fourth curved web mount wherein fourth deposition equipment pattern said first and second semiconductor layer in a second pattern;

a fifth curved web mount wherein fifth deposition equipment deposits a second metal layer in a third pattern; and

a sixth curved web mount wherein sixth deposition equipment etches and passivates.

50. An apparatus as in claim 49 wherein said substrate is flipped between each of said curved web mounts.

51. An apparatus for in-line fabrication of transistors on a curved surface of a flexible substrate comprising:

a pair of separable web mounts;

a plurality of deposition equipments comprising;

a first deposition equipment which deposits a passivation layer on said substrate;

a second deposition equipment which deposits a first metal layer in a first pattern;

a third deposition equipment which deposits an insulator layer, a first semiconductor layer, and a second semiconductor layer;

a fourth deposition equipment which pattern said first and second semiconductor layer in a second pattern;

a fifth deposition equipment which deposits a second metal layer in a third pattern; and

a sixth which deposition equipment etches and passivates.

52. An apparatus as in claim 51 wherein said plurality of deposition equipments are enclosed by said separable web mounts.

53. An apparatus as in claim 52 wherein said plurality of deposition equipments are movable into and out of said separable web mounts.

54. An apparatus as in claim 51 wherein said flexible substrate is inserted along an axis formed by said separable web mounts.

55. An apparatus as in claim 51 wherein said separable web mounts are separated prior to insertion or removal of said flexible substrate.