Integrated circuit chip utilizing dielectric layer having oriented cylindrical voids formed from carbon nanotubes
First Claim
1. A method of making an integrated circuit chip, comprising the steps of:
- providing a chip substrate having a plurality of active devices formed therein;
forming a plurality of cylindrical form structures on a surface of said integrated circuit chip;
depositing a layer of dielectric over said surface of said integrated circuit chip to surround said cylindrical form structures;
removing said cylindrical form structures to create a dielectric layer structure having voids therein; and
forming a plurality of discrete conductors in said dielectric layer structure.
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Accused Products
Abstract
A dielectric in an integrated circuit is formed by creating oriented cylindrical voids in a conventional dielectric material. Preferably, voids are formed by first forming multiple relatively long, thin carbon nanotubes perpendicular to a surface of an integrated circuit wafer, by depositing a conventional dielectric on the surface to fill the area between the carbon nanotubes, and by then removing the carbon nanotubes to produce voids in place of the carbon nanotubes. A layer of dielectric and voids thus formed can be patterned or otherwise processed using any of various conventional processes. The use of a conventional dielectric material having numerous air voids substantially reduces the dielectric constant, leaving a dielectric structure which is both structurally strong and can be constructed compatibly with conventional processes and materials.
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Citations
30 Claims
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1. A method of making an integrated circuit chip, comprising the steps of:
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providing a chip substrate having a plurality of active devices formed therein;
forming a plurality of cylindrical form structures on a surface of said integrated circuit chip;
depositing a layer of dielectric over said surface of said integrated circuit chip to surround said cylindrical form structures;
removing said cylindrical form structures to create a dielectric layer structure having voids therein; and
forming a plurality of discrete conductors in said dielectric layer structure. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An integrated circuit chip having a plurality of substantially planar parallel layers deposited over a substrate, including:
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a first plurality of substantially planar parallel conductor layers, each conductor layer comprising a plurality of discrete conductors separated by a dielectric;
a second plurality of substantially planar parallel insulative layers, each insulative layer comprising a dielectric penetrated by a plurality of conductive vias;
at least one of said layers comprising a dielectric structure containing a plurality of cylindrical voids therein, said cylindrical voids being oriented perpendicular to said at least one layer, said cylindrical voids being substantially smaller than said conductive vias. - View Dependent Claims (13, 14, 15, 16)
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17. A method of making an integrated circuit chip, comprising the steps of:
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providing a chip substrate having a plurality of active devices formed therein;
forming a plurality of substantially planar parallel layers over said chip substrate, including (a) a first plurality of substantially planar parallel conductor layers, each conductor layer comprising a plurality of discrete conductors separated by a dielectric, and (b) a second plurality of substantially planar parallel insulative layers, each insulative layer comprising a dielectric penetrated by a plurality of conductive vias wherein said step of forming a plurality of substantially planar parallel layers comprises forming a dielectric structure containing a plurality of cylindrical voids within at least one of said layers, said cylindrical voids being oriented perpendicular to said at least one layer, said cylindrical voids being substantially smaller than said conductive vias. - View Dependent Claims (18, 19, 20, 21)
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22. A method of forming a dielectric insulative structure, comprising the steps of:
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forming a plurality of cylindrical form structures on a surface, said cylindrical form structures being oriented substantially perpendicular to said surface;
depositing a layer of dielectric over said surface to surround said cylindrical form structures;
removing said cylindrical form structures to create a dielectric insulative structure having voids therein. - View Dependent Claims (23, 24, 25)
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26. A method of forming a dielectric layer within an integrated circuit chip, comprising the steps of:
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forming a plurality of carbon nanotubes on a surface of said integrated circuit chip;
depositing a layer of dielectric over said surface of said integrated circuit chip to surround said carbon nanotubes;
removing said carbon nanotubes to create said dielectric layer structure, said dielectric layer structure having voids therein. - View Dependent Claims (27, 28, 29, 30)
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Specification