Radio integrated circuit with integrated power amplifier

• US 20060128347A1
• Filed: 02/13/2006
• Published: 06/15/2006
• Est. Priority Date: 12/02/2003
• Status: Abandoned Application

• Current Assignee: Maxim Integrated Products, Inc. (Analog Devices, Inc.)
• Original Assignee: Maxim Integrated Products, Inc. (Analog Devices, Inc.)
• Inventors: Drogi, Serge Francois, Vinayak, Vikas, Dropmann, Hans, King, Joel, Olsen, Gordon, Piriyapoksombut, Pramote
• Application Number:
  US11/353,639
• Publication Number:
  US 20060128347A1
• Time in Patent Office: Days
• US Class Current: 455/333
• CPC Class Codes: H04B 1/0003 Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00
• CPC Class Codes: H04B 1/40 Circuits

Abstract

A radio system includes a radio frequency (RF) integrated circuit (IC), a baseband digital signal processing (DSP) IC, and a serial digital interface coupling data there-between. In one embodiment of the invention, the RF IC has an input receiver to receive a serial digital transmission bit stream from a digital signal processing integrated circuit; a data recoverer coupled to the input receiver to recover digital data bits from the serial digital transmission bit stream; a low pass filter coupled to the data recoverer convert the digital data bits into an analog transmission signal; a mixer coupled to the low pass filter to up-convert the analog transmission signal from a baseband frequency to a second selectable carrier frequency as a transmit radio frequency signal; and an amplifier coupled to the mixer and an antenna, the amplifier to amplify the transmit radio frequency signal for broadcast over the antenna.

Claims

1. A radio frequency integrated circuit comprising:

an input receiver to receive a serial digital transmission bit stream from a digital signal processing integrated circuit;

a data recoverer coupled to the input receiver, the data recoverer to recover digital data bits from the serial digital transmission bit stream;

a low pass filter coupled to the data recoverer, the low pass filter to convert the digital data bits into an analog transmission signal;

a mixer coupled to the low pass filter, the mixer to up-convert the analog transmission signal from a baseband frequency to a second selectable carrier frequency as a transmit radio frequency signal; and

a first power amplifier coupled to the mixer and selectively coupled to an antenna, the first power amplifier to amplify the transmit radio frequency signal for broadcast over the antenna.

2. The radio frequency integrated circuit of claim 1, wherein

the serial digital transmission bit stream has a reduced output voltage swing to further reduce noise, and

the input receiver to increase the output voltage swing of the serial digital transmission bit stream in the radio frequency integrated circuit.

3. The radio frequency integrated circuit of claim 1, wherein

the radio frequency integrated circuit is a transmitter/receiver and further includes,

a plurality of gain amplifiers to couple to an antenna to simultaneously receive wireless radio frequency signals of selectable carrier frequencies;

a plurality of down converters coupled to the plurality of gain amplifiers, the plurality of down converters to simultaneously extract analog signals from the wireless radio frequency signals; and

a plurality of sigma delta modulators coupled to the plurality of down converters, the plurality of single bit sigma delta modulators to simultaneously convert the analog signals into serial digital bit streams; and

a plurality of output drivers coupled to the plurality of single bit sigma delta modulators, the plurality of output drivers to couple the serial digital bit streams to another integrated circuit.

4. The radio frequency integrated circuit of claim 3, wherein,

the plurality of output drivers further to reduce an output voltage swing of the serial digital bit streams to reduce noise generation as the serial digital bit streams are coupled to the digital signal processor integrated circuit.

5. The radio frequency integrated circuit of claim 3, wherein

the plurality of gain amplifiers are a variable gain amplifier or a switched gain amplifier.

6. The radio frequency integrated circuit of claim 1, wherein

the radio frequency integrated circuit is a transmitter.

7. The radio frequency integrated circuit of claim 1, further comprising:

a second power amplifier coupled to the mixer and selectively coupled to the antenna, the second power amplifier to amplify the transmit radio frequency signal for broadcast over the antenna.

8. A radio frequency integrated circuit comprising:

an input receiver having a differential input to receive a differential serial transmit signal, the input receiver having a serial digital output;

a data recoverer having an input coupled to the serial digital output of the input receiver, the data recoverer having a serial digital output;

a low pass filter having an input coupled to the serial digital output of the data recoverer, the low pass filter having an analog output;

a mixer having an input coupled to the analog output of the low pass filter, the mixer having an analog output; and

a first power amplifier having an input coupled to the analog output of the mixer, the first power amplifier having a first output to selectively couple to the antenna.

9. The radio frequency integrated circuit of claim 8, further comprising:

a second power amplifier having an input coupled to the analog output of the mixer, the second power amplifier having a second output to selectively couple to the antenna.

10. The radio frequency integrated circuit of claim 9, further comprising:

a third power amplifier having an input coupled to the analog output of the mixer, the third power amplifier having a third output to selectively couple to the antenna.

11. The radio frequency integrated circuit of claim 10, further comprising:

a ramp digital to analog converter to gently increase the power provided by the first, second, and third power amplifiers into the antenna.

12. The radio frequency integrated circuit of claim 10, wherein

the radio frequency integrated circuit is a transmitter and

the first power amplifier is for transmission over a Global System for Multiple Communication (GSM) wireless communication system and cellular wireless communication systems, the second power amplifier is for transmission over a Digital Communication System (DCS) wireless communication system and a Personal Communication System (PCS) wireless communication system, and the third power amplifier is for transmission over a International Mobile Telecommunication (IMT) wireless communication system.

13. The radio frequency integrated circuit of claim 10, wherein

the radio frequency integrated circuit is a transmitter and

the first power amplifier, the second power amplifier, and the third power amplifier are for transmitting signals over one or more wireless communication systems in the set of Universal Mobile Telecommunication System (UMTS), Global System for Multiple Communication (GSM), GSM Mobile Application Part (GSM-MAP), General Packet Radio Protocol System or General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), Orthogonal Frequency-Division Multiplexing (OFDM), Code Orthogonal Frequency Division Multiplexing (COFDM), Block Coding, Convolutional Coding, Turbo Coding, Trellis Coding, Frequency Modulation (FM), Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA), Code Division Multiple Access (CDMA), Narrowband CDMA (N-CDMA), Wideband CDMA (W-CDMA), CDMA2000, CDMA2000-1XEV, CDMA2000-EVDO, CDMA2000-EDV, Time Division-Synchronized Code Division Multiple Access (TD-SCDMA), Third-Generation Partnership Project (3GPP TDD), International Mobile Telecommunication (IMT), IMT2000MC, IMT2000DS, IMT2000SC, IMT2000TC, Personal Communication System (PCS), Digital Communication System (DCS), Personal Digital Cellular (PDC), Digital Enhanced Cordless Telecommunications (DECT), Advanced Mobile Phone System (AMPS), and Wireless Local Area Network (LAN) (IEEE 802.11a, IEEE 802.11b, IEEE 802.11g).

14. The radio frequency integrated circuit of claim 8, wherein

the radio frequency integrated circuit is a transmitter/receiver and further includes,

a gain amplifier having an input to couple to the antenna, the gain amplifier having an analog output;

a down converter having an analog input coupled to the analog output of the gain amplifier, the down converter having an analog output;

a single bit sigma delta modulator having an analog input coupled to the analog output of the down converter, the single bit sigma delta modulator having a serial digital output; and

an output driver having an input coupled to the serial digital output of the single bit sigma delta modulator, the output driver having a differential output.

15. A radio frequency integrated circuit comprising:

at least one gain amplifier to couple to an antenna to receive a first wireless radio frequency signal of a first selectable carrier frequency;

at least one down converter coupled to the at least one gain amplifier, the at least one down converter to extract a first analog signal from the first wireless radio frequency signal;

at least one single bit sigma delta modulator coupled to the at least one down converter, the at least one single bit sigma delta modulator to convert the first analog signal into a first serial digital bit stream;

at least one output driver coupled to the at least one single bit sigma delta modulator, the at least one output driver to provide a low voltage output swing of the first serial digital bit stream to reduce noise generation as the first serial digital bit stream is coupled to another integrated circuit;

an input receiver to receive a second serial digital bit stream to be transmitted;

a data recoverer coupled to the input receiver, the data recoverer to recover digital data bits from the second serial digital bit stream;

a low pass filter coupled to the data recoverer, the low pass filter to convert the digital data bits into a second analog signal;

a mixer coupled to the low pass filter, the mixer to up-convert the second analog signal from a baseband frequency to a second selectable carrier frequency as a second wireless radio frequency signal; and

an amplifier coupled to the mixer, the amplifier to amplify the second wireless radio frequency signal for broadcast over the antenna.

16. The radio frequency integrated circuit of claim 15, wherein

the first selected carrier frequency and the second selected carrier frequency are selected from a set of carrier frequencies of a first selected wireless communication system.

17. The radio frequency integrated circuit of claim 15, wherein

the selected wireless communication system is selected from the set of Universal Mobile Telecommunication System (UMTS), Global System for Multiple Communication (GSM), GSM Mobile Application Part (GSM-MAP), General Packet Radio Protocol System or General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), Orthogonal Frequency-Division Multiplexing (OFDM), Code Orthogonal Frequency Division Multiplexing (COFDM), Block Coding, Convolutional Coding, Turbo Coding, Trellis Coding, Frequency Modulation (FM), Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA), Code Division Multiple Access (CDMA), Narrowband CDMA (N-CDMA), Wideband CDMA (W-CDMA), CDMA2000, CDMA2000-1XEV, CDMA2000-EVDO, CDMA2000-EDV, Time Division-Synchronized Code Division Multiple Access (TD-SCDMA), Third-Generation Partnership Project (3GPP TDD), International Mobile Telecommunication (IMT), IMT2000MC, IMT2000DS, IMT2000SC, IMT2000TC, Personal Communication System (PCS), Digital Communication System (DCS), Personal Digital Cellular (PDC), Digital Enhanced Cordless Telecommunications (DECT), Advanced Mobile Phone System (AMPS), Wireless Local Area Network (LAN) (IEEE 802.11a, IEEE 802.11b, IEEE 802.11g), and Global Positioning System (GPS).

18. The radio frequency integrated circuit of claim 15, wherein

the first selected carrier frequency is selected from a set of carrier frequencies associated with a wireless communication system of the set of a Universal Mobile Telecommunication System (UMTS), Global System for Multiple Communication (GSM), GSM Mobile Application Part (GSM-MAP), General Packet Radio Protocol System or General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), Orthogonal Frequency-Division Multiplexing (OFDM), Code Orthogonal Frequency Division Multiplexing (COFDM), Frequency Modulation (FM), Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA), Code Division Multiple Access (CDMA), Narrowband CDMA (N-CDMA), Wideband CDMA (W-CDMA), CDMA2000, CDMA2000-1XEV, CDMA2000-EVDO, CDMA2000-EDV, Time Division-Synchronized Code Division Multiple Access (TD-SCDMA), Third-Generation Partnership Project (3GPP TDD), International Mobile Telecommunication (IMT), IMT2000MC, IMT2000DS, IMT2000SC, IMT2000TC, Personal Communication System (PCS), Digital Communication System (DCS), Personal Digital Cellular (PDC), Digital Enhanced Cordless Telecommunications (DECT), Advanced Mobile Phone System (AMPS), Wireless Local Area Network (LAN) (IEEE 802.11a, IEEE 802.11b, IEEE 802.11g), and Global Positioning System (GPS), and the second selected carrier frequency is selected from a set of carrier frequencies associated with a wireless communication system of the set of Universal Mobile Telecommunication System (UMTS), Global System for Multiple Communication (GSM), GSM Mobile Application Part (GSM-MAP), General Packet Radio Protocol System or General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), Orthogonal Frequency-Division Multiplexing (OFDM), Code Orthogonal Frequency Division Multiplexing (COFDM), Frequency Modulation (FM), Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA), Code Division Multiple Access (CDMA), Narrowband CDMA (N-CDMA), Wideband CDMA (W-CDMA), CDMA2000, CDMA2000-1XEV, CDMA2000-EVDO, CDMA2000-EDV, Time Division-Synchronized Code Division Multiple Access (TD-SCDMA), Third-Generation Partnership Project (3GPP TDD), International Mobile Telecommunication (IMT), IMT2000MC, IMT2000DS, IMT2000SC, IMT2000TC, Personal Communication System (PCS), Digital Communication System (DCS), Personal Digital Cellular (PDC), Digital Enhanced Cordless Telecommunications (DECT), Advanced Mobile Phone System (AMPS), and Wireless Local Area Network (LAN) (IEEE 802.11a, IEEE 802.11b, IEEE 802.11g).

19. The radio frequency integrated circuit of claim 15, wherein

the radio frequency integrated circuit is a transceiver having a transmitter and a receiver.

20. The radio frequency integrated circuit of claim 15, further comprising

a second gain amplifier to couple to the antenna to simultaneously receive a third wireless radio frequency signal of a third selectable carrier frequency;

a second down converter coupled to the second gain amplifier, the second down converter to extract a third analog signal from the third wireless radio frequency signal;

a second single bit sigma delta modulator coupled to the second down converter, the second single bit sigma delta modulator to convert the third analog signal into a third serial digital bit stream; and

a second output driver coupled to the second single bit sigma delta modulator, the second output driver to provide a low voltage output swing of the third serial digital bit stream to reduce noise generation as the third serial digital bit stream is coupled to another integrated circuit.

21. The radio frequency integrated circuit of claim 15, wherein

the at least one gain amplifier is a variable gain amplifier or a switched gain amplifier.

22. The radio frequency integrated circuit of claim 20, wherein

the at least one gain amplifier and the second gain amplifier are variable gain amplifiers or switched gain amplifiers.

23. A system comprising:

a digital signal processing integrated circuit including

a sigma-delta modulator having a parralel digital input and a serial digital output, the sigma-delta modulator to receive a parallel digital transmit signal and generate a serial transmit signal,

an output driver having a digital input coupled to the serial digital output of the sigma-delta modulator to receive the serial transmit signal, the output driver further having a differential output, the output driver to generate a differential serial transmit signal on the differential output in response to the serial transmit signal; and

a radio frequency integrated circuit coupled to the digital signal processing integrated circuit, the radio frequency integrated circuit including

an input receiver having a differential input coupled to the differential output of the output driver, the input receiver to receive the differential serial transmit signal, the input receiver having a serial digital output;

a data recoverer having an input coupled to the serial digital output of the input receiver, the data recoverer having a serial digital output;

a low pass filter having an input coupled to the serial digital output of the data recoverer, the low pass filter having an analog output;

a mixer having an input coupled to the analog output of the low pass filter, the mixer having an analog output; and

a first power amplifier having an input coupled to the analog output of the mixer, the first power amplifier having a first output to selectively couple to an antenna.

24. The system of claim 23, wherein

the digital signal processing integrated circuit further includes

a data modulator coupled to the sigma-delta modulator, the data modulator to receive transmit data and provide channel mdulation to generate the parallel transmit signal.

25. The system of claim 23, wherein

the sigma-delta modulator modulator is a single bit analog to digital converter and a modulator coupled together.

26. The system of claim 23, wherein

the radio frequency integrated circuit further includes

a second power amplifier having an input coupled to the analog output of the mixer, the second power amplifier having a second output to selectively couple to the antenna.

27. The system of claim 26, wherein

the radio frequency integrated circuit further includes

a third power amplifier having an input coupled to the analog output of the mixer, the third power amplifier having a third output to selectively couple to the antenna.

28. The system of claim 27, wherein

the radio frequency integrated circuit further includes

a ramp digital to analog converter to gently increase the power provided by the first, second, and third power amplifiers into the antenna.

29. The system of claim 27, wherein

the first power amplifier is for transmission over a Global System for Multiple Communication (GSM) wireless communication system and cellular wireless communication systems, the second power amplifier is for transmission over a Digital Communication System (DCS) wireless communication system and a Personal Communication System (PCS) wireless communication system, and the third power amplifier is for transmission over a International Mobile Telecommunication (IMT) wireless communication system.

30. The system of claim 27, wherein

the first power amplifier, the second power amplifier, and the third power amplifier are for transmitting signals over one or more wireless communication systems in the set of Universal Mobile Telecommunication System (UMTS), Global System for Multiple Communication (GSM), GSM Mobile Application Part (GSM-MAP), General Packet Radio Protocol System or General Packet Radio Service (GPRS), Enhanced Data GSM Environment (EDGE), Orthogonal Frequency-Division Multiplexing (OFDM), Code Orthogonal Frequency Division Multiplexing (COFDM), Block Coding, Convolutional Coding, Turbo Coding, Trellis Coding, Frequency Modulation (FM), Frequency Division Multiple Access (FDMA), Time Division Multiple Access (TDMA), Code Division Multiple Access (CDMA), Narrowband CDMA (N-CDMA), Wideband CDMA (W-CDMA), CDMA2000, CDMA2000-1XEV, CDMA2000-EVDO, CDMA2000-EDV, Time Division-Synchronized Code Division Multiple Access (TD-SCDMA), Third-Generation Partnership Project (3GPP TDD), International Mobile Telecommunication (IMT), IMT2000MC, IMT2000DS, IMT2000SC, IMT2000TC, Personal Communication System (PCS), Digital Communication System (DCS), Personal Digital Cellular (PDC), Digital Enhanced Cordless Telecommunications (DECT), Advanced Mobile Phone System (AMPS), and Wireless Local Area Network (LAN) (IEEE 802.11a, IEEE 802.11b, IEEE 802.11g).

31. The system of claim 23, wherein

the output driver has a low voltage output swing, the output driver to drive the differential serial transmit signal out of the digital signal processing integrated circuit with the low voltage output swing.

32. The system of claim 31, wherein

the input receiver to receive the differential serial transmit signal with the low voltage output swing.

33. The system of claim 32, wherein

the input receiver further to increase the low voltage output swing of the differential serial transmit signal within the radio frequency integrated circuit.

34. The system of claim 33, wherein

the low voltage output swing between a high logic level and a low logic level is less than an output swing between a high logic level and a low logic level of a three volt complementary metal oxide semiconductor (CMOS) process technology.

35. The system of claim 33, wherein

the low voltage output swing between a high logic level and a low logic level is less than an output swing between a high logic level of 1.8 volts and a low logic level of 0.2 volts.

36. The system of claim 33, wherein

the output driver translates first voltage levels of a first output voltage swing of the differential serial transmit signal into second voltage levels with a second output voltage swing less than the first output voltage swing, and

the input receiver translates the second voltage levels of the second output voltage swing into third voltage levels with a third output voltage swing greater than the second output voltage swing.

37. The system of claim 36, wherein

the third voltage levels are substantially the same as the first voltage levels.

38. The system of claim 33, wherein

the output driver is a low voltage differential signaling transmitter to generate a low voltage differential output signal with a low voltage differential swing, and

the input receiver is a low voltage differential signaling receiver to receive the low voltage differential output signal with the low voltage differential swing.

39. The system of claim 38, wherein

the low voltage differential swing is at least 100 milli-volts.

40. A method for a radio frequency communication system, the method comprising:

providing a serial digital interface between a radio frequency integrated circuit and a digital signal processing integrated circuit;

providing a sigma-delta modulator in the radio frequency integrated circuit;

integrating one or more power amplifiers into the radio frequency integrated circuit; and

selectively coupling the one or more power amplifiers to one or more antennae.

41. The method of claim 40, wherein

the providing of the digital interface and the providing of the sigma-delta modulator conserves power to integrate the one or more power amplifiers into the radio frequency integrated circuit.

42. The method of claim 40, further comprising:

providing a sigma-delta modulator in the digital signal processing integrated circuit.